How not to lie with statistics: the correct way to summarize benchmark results
Communications of the ACM - The MIT Press scientific computation series
Computer benchmarking: paths and pitfalls
IEEE Spectrum
ParcBench: a benchmark for shared-memory architectures
ACM SIGARCH Computer Architecture News
An aperiodic storage scheme to reduce memory conflicts in vector processors
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
Performance analysis of high-speed computers
Proceedings of the 1989 ACM/IEEE conference on Supercomputing
IEEE Transactions on Computers
A study of scalar compilation techniques for pipelined supercomputers
ACM Transactions on Mathematical Software (TOMS)
Guest Editor's Introduction: Experimental Research in Computer Architecture
Computer - Special issue on experimental research in computer architecture
Analyzing the performance of message passing MIMD Hypercubes: a study with the Intel iPSC/860
ICS '91 Proceedings of the 5th international conference on Supercomputing
Supercomputer workload decomposition and analysis
ICS '91 Proceedings of the 5th international conference on Supercomputing
Avoidance and suppression of compensation code in a trace scheduling compiler
ACM Transactions on Programming Languages and Systems (TOPLAS)
Let-floating: moving bindings to give faster programs
Proceedings of the first ACM SIGPLAN international conference on Functional programming
An evaluation of functional unit lengths for single-chip processors
MICRO 23 Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture
I/O scheduling for digital continuous media
Multimedia Systems
A PCI bus simulation framework and some simulation results on PCI Standard 2.1 latency limitations
Journal of Systems Architecture: the EUROMICRO Journal
Profit-Effective Parallel Computing
IEEE Concurrency
IEEE Micro
Software Measurement: A Necessary Scientific Basis
IEEE Transactions on Software Engineering
MisSPECulation: partial and misleading use of SPEC CPU2000 in computer architecture conferences
Proceedings of the 30th annual international symposium on Computer architecture
On the Performance Regularity of Web Servers
World Wide Web
More on finding a single number to indicate overall performance of a benchmark suite
ACM SIGARCH Computer Architecture News
War of the benchmark means: time for a truce
ACM SIGARCH Computer Architecture News
International Journal of High Performance Computing Applications
The Structural Complexity of Software: An Experimental Test
IEEE Transactions on Software Engineering
New results on computable efficiency and its stability for complex networks
Journal of Computational and Applied Mathematics - Special issue on computational and mathematical methods in science and engineering (CMMSE-2004)
The harmonic or geometric mean: does it really matter?
ACM SIGARCH Computer Architecture News
Choosing a leader on a complex network
Journal of Computational and Applied Mathematics
Cooperative cache partitioning for chip multiprocessors
Proceedings of the 21st annual international conference on Supercomputing
An optimal multiprocessor combinatorial auction solver
Computers and Operations Research
Hypermatrix oriented supernode amalgamation
The Journal of Supercomputing
Proceedings of the eleventh international joint conference on Measurement and modeling of computer systems
A case for integrated processor-cache partitioning in chip multiprocessors
Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis
Accurately evaluating application performance in simulated hybrid multi-tasking systems
Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
Paper: Toward a taxonomy of performance metrics
Parallel Computing
Paper: Scientific benchmark characterizations
Parallel Computing
Parallel Computing
Paper: A comparative study of automatic vectorizing compilers
Parallel Computing
Scheduling real-time garbage collection on uniprocessors
ACM Transactions on Computer Systems (TOCS)
Multilayer cache partitioning for multiprogram workloads
Euro-Par'11 Proceedings of the 17th international conference on Parallel processing - Volume Part I
Capacity metric for chip heterogeneous multiprocessors
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
How to measure useful, sustained performance
State of the Practice Reports
A cache-partitioning aware replacement policy for chip multiprocessors
HiPC'06 Proceedings of the 13th international conference on High Performance Computing
Proceedings of the 21st international conference on Parallel architectures and compilation techniques
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The controversy surrounding single number performance reduction is examined and solutions are suggested through a comparison of measures.