Evaluating the impact of job scheduling and power management on processor lifetime for chip multiprocessors

  • Authors:
  • Ayse K. Coskun;Richard Strong;Dean M. Tullsen;Tajana Simunic Rosing

  • Affiliations:
  • UC San Diego, La Jolla, CA, USA;UC San Diego, La Jolla, CA, USA;UC San Diego, La Jolla, CA, USA;UC San Diego, La Jolla, CA, USA

  • Venue:
  • Proceedings of the eleventh international joint conference on Measurement and modeling of computer systems
  • Year:
  • 2009

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Abstract

Temperature-induced reliability issues are among the major challenges for multicore architectures. Thermal hot spots and thermal cycles combine to degrade reliability. This research presents new reliability-aware job scheduling and power management approaches for chip multiprocessors. Accurate evaluation of these policies requires a novel simulation framework that can capture architecture-level effects over tens of seconds or longer, while also capturing thermal interactions among cores resulting from dynamic scheduling policies. Using this framework and a set of new thermal management policies, this work shows that techniques that offer similar performance, energy, and even peak temperature can differ significantly in their effects on the expected processor lifetime.