Instruction level power analysis and optimization of software
Journal of VLSI Signal Processing Systems - Special issue on technologies for wireless computing
Practical low power digital VLSI design
Practical low power digital VLSI design
Reducing power in high-performance microprocessors
DAC '98 Proceedings of the 35th annual Design Automation Conference
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
A methodology for accurate performance evaluation in architecture exploration
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
LISA—machine description language for cycle-accurate models of programmable DSP architectures
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Modeling and automating selection of guarding techniques for datapath elements
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
MetaCore: an application-specific programmable DSP development system
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Application specific compiler/architecture codesign: a case study
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Retargetable Code Generation for Digital Signal Processors
Retargetable Code Generation for Digital Signal Processors
Digital Signal Processing for Multimedia Systems
Digital Signal Processing for Multimedia Systems
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Incorporating compiler feedback into the design of ASIPs
EDTC '95 Proceedings of the 1995 European conference on Design and Test
ASIP Design Methodologies: Survey and Issues
VLSID '01 Proceedings of the The 14th International Conference on VLSI Design (VLSID '01)
PEAS-III: An ASIP Design Environment
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
A survey on modeling issues using the machine description language LISA
ICASSP '01 Proceedings of the Acoustics, Speech, and Signal Processing, 200. on IEEE International Conference - Volume 02
ICASSP '01 Proceedings of the Acoustics, Speech, and Signal Processing, 200. on IEEE International Conference - Volume 02
Proceedings of the 2007 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Code transformation and instruction set extension
ACM Transactions on Embedded Computing Systems (TECS)
Energy-performance Exploration of a CGA-based SDR Processor
Journal of Signal Processing Systems
Design of a low power pre-synchronization ASIP for multimode SDR terminals
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
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Application-specific instruction set processors (ASIPs) are an excellent implementation paradigm for mixed control-/data-flow oriented tasks with medium to low data rate and high complexity. The main advantage of ASIPs is the higher flexibility due to programmability compared to dedicated hardware. This article discusses an ASIP design methodology starting from the instruction set architecture description language LISA, which enables automatic generation of the necessary DSP tools like assembler, linker and simulator as well as generation of large parts of the synthesizable hardware description. The presented methodology has the goal to obtain working silicon in a short amount of time. Furthermore, the classical parameters computational performance and area are jointly considered with the impact of architectural modifications on energy consumption using gate-level estimations. Different pipeline structures from two to four pipeline stages together with several ASIP energy optimization options have been implemented and evaluated. These optimizations include clock-gating, logic netlist restructuring, data-path optimization, instruction memory power reduction by optimized instruction encoding, and implementation of a dedicated coprocessor. The practical applicability of this methodology is demonstrated with the ICORE ASIP for DVB-T acquisition and tracking algorithms. The results of this case study reveal a potential of about one order of magnitude in energy savings. Furthermore a significant decrease in design time was achieved due to the LISA methodology.