Databus charge recovery: practical considerations
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
GLSVLSI '00 Proceedings of the 10th Great Lakes symposium on VLSI
Dynamic power consumption in Virtex™-II FPGA family
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
Methodical Low-Power ASIP Design Space Exploration
Journal of VLSI Signal Processing Systems
Low Power Rake Receiver and Viterbi Decoder Design for CDMA Applications
Wireless Personal Communications: An International Journal
Energy-efficient signal processing using FPGAs
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
Switching activity analysis and pre-layout activity prediction for FPGAs
Proceedings of the 2003 international workshop on System-level interconnect prediction
Power Macro-Modelling for Firm-Macro
PATMOS '00 Proceedings of the 10th International Workshop on Integrated Circuit Design, Power and Timing Modeling, Optimization and Simulation
A Flexible Power Model for FPGAs
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
A Low Power Correlator for CDMA Wireless Systems
Journal of VLSI Signal Processing Systems
A low-power adder operating on effective dynamic data ranges
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Domain-Specific Modeling for Rapid Energy Estimation of Reconfigurable Architectures
The Journal of Supercomputing
Minimization of switching activities of partial products for designing low-power multipliers
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
Active leakage power optimization for FPGAs
FPGA '04 Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays
Low-power technology mapping for FPGA architectures with dual supply voltages
FPGA '04 Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays
High-Performance Low-Power Left-to-Right Array Multiplier Design
IEEE Transactions on Computers
Power estimation techniques for FPGAs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Energy-Efficient Computations on FPGAs
The Journal of Supercomputing
A detailed power model for field-programmable gate arrays
ACM Transactions on Design Automation of Electronic Systems (TODAES)
The circuit design of the synergistic processor element of a CELL processor
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Low power synthesizable register files for processor and IP cores
Integration, the VLSI Journal - Special issue: Low-power design techniques
Lowering power in an experimental RISC processor
Microprocessors & Microsystems
Energy-efficient Hardware Accelerators for the SA-DCT and Its Inverse
Journal of VLSI Signal Processing Systems
Energy-efficient acceleration of MPEG-4 compression tools
EURASIP Journal on Embedded Systems
Low power synthesizable register files for processor and IP cores
Integration, the VLSI Journal - Special issue: Low-power design techniques
Improving first order differential power attacks through digital signal processing
Proceedings of the 3rd international conference on Security of information and networks
Technology mapping and clustering for FPGA architectures with dual supply voltages
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A hierarchical design of high performance 8x8 bit multiplier based on Vedic mathematics
Proceedings of the 2011 International Conference on Communication, Computing & Security
Modified Design and Analysis of a CMOS LNA for Wireless Sensor Network Applications
Wireless Personal Communications: An International Journal
Energy consumption and execution time estimation of embedded system applications
Microprocessors & Microsystems
ICATPN'06 Proceedings of the 27th international conference on Applications and Theory of Petri Nets and Other Models of Concurrency
Design of variable input delay gates for low dynamic power circuits
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Support for dynamic issue width in VLIW processors using generic binaries
Proceedings of the Conference on Design, Automation and Test in Europe
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