Low-power architectural design methodologies
Low-power architectural design methodologies
Practical low power digital VLSI design
Practical low power digital VLSI design
Cycle-accurate energy measurement and characterization with a case study of the ARM7TDMI
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Computer Arithmetic Algorithms
Computer Arithmetic Algorithms
Algorithms, Complexity Analysis and VLSI Architectures for MPEG-4 Motion Estimation
Algorithms, Complexity Analysis and VLSI Architectures for MPEG-4 Motion Estimation
A binary block matching architecture with reduced power consumption and silicon area requirement
ICASSP '96 Proceedings of the Acoustics, Speech, and Signal Processing, 1996. on Conference Proceedings., 1996 IEEE International Conference - Volume 06
Optimal frame memory and data transfer scheme for MPEG-4 shape coding
IEEE Transactions on Consumer Electronics
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
The MPEG-4 video standard verification model
IEEE Transactions on Circuits and Systems for Video Technology
Low-complexity block-based motion estimation via one-bit transforms
IEEE Transactions on Circuits and Systems for Video Technology
A comparison of block-matching algorithms mapped to systolic-array implementation
IEEE Transactions on Circuits and Systems for Video Technology
IEEE Transactions on Circuits and Systems for Video Technology
A low-power VLSI architecture for full-search block-matching motion estimation
IEEE Transactions on Circuits and Systems for Video Technology
Face segmentation using skin-color map in videophone applications
IEEE Transactions on Circuits and Systems for Video Technology
MPEG-4 standardized methods for the compression of arbitrarily shaped video objects
IEEE Transactions on Circuits and Systems for Video Technology
Normalized partial distortion search algorithm for block motion estimation
IEEE Transactions on Circuits and Systems for Video Technology
Flexible architectures for DCT of variable-length targeting shape-adaptive transform
IEEE Transactions on Circuits and Systems for Video Technology
Fast motion estimation for shape coding in MPEG-4
IEEE Transactions on Circuits and Systems for Video Technology
A fast binary motion estimation algorithm for MPEG-4 shape coding
IEEE Transactions on Circuits and Systems for Video Technology
IEEE Transactions on Circuits and Systems for Video Technology
Shape-adaptive DCT for generic coding of video
IEEE Transactions on Circuits and Systems for Video Technology
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We propose novel hardware accelerator architectures for the most computationally demanding algorithms of the MPEG-4 video compression standard-motion estimation, binary motion estimation (for shape coding), and the forward/inverse discrete cosine transforms (incorporating shape adaptive modes). These accelerators have been designed using general low-energy design philosophies at the algorithmic/architectural abstraction levels. The themes of these philosophies are avoiding waste and trading area/performance for power and energy gains. Each core has been synthesised targeting TSMC 0.09 µm TCBN90LP technology, and the experimental results presented in this paper show that the proposed cores improve upon the prior art.