Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
Practical low power digital VLSI design
Practical low power digital VLSI design
CASL: A rapid-prototyping language for modern micro-architectures
Computer Languages, Systems and Structures
FSE'10 Proceedings of the 17th international conference on Fast software encryption
Performance analysis of the SHA-3 candidates on exotic multi-core architectures
CHES'10 Proceedings of the 12th international conference on Cryptographic hardware and embedded systems
High-performance modular multiplication on the cell processor
WAIFI'10 Proceedings of the Third international conference on Arithmetic of finite fields
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A 32b 4-way SIMD dual-issue synergistic processor element of a CELL processor is developed with 20.9 million transistors in 14.8mm/sup 2/ using a 90nm SOI technology. CMOS static gates implement the majority of the logic. Dynamic circuits are used in critical areas, occupying 19% of the nonSRAM area. ISA, microarchitecture and physical implementation are tightly coupled to achieve a compact and power efficient design. Correct operation has been observed up to 5.6GHz at 1.4V supply and 56/spl deg/C.