A scalable cross-platform infrastructure for application performance tuning using hardware counters

  • Authors:
  • S. Browne;J. Dongarra;N. Garner;K. London;P. Mucci

  • Affiliations:
  • Computer Science Dept., University of Tennessee, Knoxville;Computer Science Dept., University of Tennessee, Knoxville and Oak Ridge National Laboratory;Computer Science Dept., University of Tennessee, Knoxville;Computer Science Dept., University of Tennessee, Knoxville;Computer Science Dept., University of Tennessee, Knoxville

  • Venue:
  • Proceedings of the 2000 ACM/IEEE conference on Supercomputing
  • Year:
  • 2000

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Abstract

The purpose of the PAPI project is to specify a standard API for accessing hardware performance counters available on most modern microprocessors. These counters exist as a small set of registers that count “events”, which are occurrences of specific signals and states related to the processor's function. Monitoring these events facilitates correlation between the structure of source/object code and the efficiency of the mapping of that code to the underlying architecture. This correlation has a variety of uses in performance analysis and tuning. The PAPI project has proposed a standard set of hardware events and a standardcross-platform library interface to the underlying counter hardware. The PAPI library has been or is in the process of being implemented on all major HPC platforms. The PAPI project is developing end-user tools for dynamically selecting and displaying hardware counter performance data. PAPI support is also being incorporated into a number of third-party tools.