Effective use of boolean satisfiability procedures in the formal verification of superscalar and VLIW

Authors:
Miroslav N. Velev;Randal E. Bryant
Affiliations:
Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA;Department of Electrical and Computer Engineering, School of Computer Science, Carnegie Mellon University, Pittsburgh, PA
Venue:
Proceedings of the 38th annual Design Automation Conference
Year:
2001

Citing 36
Cited 48

Symbolic Boolean manipulation with ordered binary-decision diagrams

ACM Computing Surveys (CSUR)
Random generation of test instances for logic optimizers

DAC '94 Proceedings of the 31st annual Design Automation Conference
Improvements to propositional satisfiability search algorithms

Improvements to propositional satisfiability search algorithms
Experimental results on the crossover point in random 3-SAT

Artificial Intelligence - Special volume on frontiers in problem solving: phase transitions and complexity
Dynamic variable ordering for ordered binary decision diagrams

ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Computer architecture (2nd ed.): a quantitative approach

Computer architecture (2nd ed.): a quantitative approach
GRASP: A Search Algorithm for Propositional Satisfiability

IEEE Transactions on Computers
Proactive computing

Communications of the ACM
Formal verification of superscale microprocessors with multicycle functional units, exception, and branch prediction

Proceedings of the 37th Annual Design Automation Conference
A BDD-based satisfiability infrastructure using the unate recursive paradigm

DATE '00 Proceedings of the conference on Design, automation and test in Europe
Processor verification using efficient reductions of the logic of uninterpreted functions to propositional logic

ACM Transactions on Computational Logic (TOCL)
Chaff: engineering an efficient SAT solver

Proceedings of the 38th annual Design Automation Conference
Heavy-Tailed Phenomena in Satisfiability and Constraint Satisfaction Problems

Journal of Automated Reasoning
The Propositional Formula Checker HeerHugo

Journal of Automated Reasoning
A Discrete Lagrangian-Based Global-SearchMethod for Solving Satisfiability Problems

Journal of Global Optimization
New Techniques for Deterministic Test Pattern Generation

Journal of Electronic Testing: Theory and Applications
Collection and Analysis of Microprocessor Design Errors

IEEE Design & Test
Random Generation of Satisfiable and Unsatisfiable CNF Predicates

Proceedings of the IFIP 12th World Computer Congress on Algorithms, Software, Architecture - Information Processing '92, Volume 1 - Volume I
Design of Experiments for Evaluation of BDD Packages Using Controlled Circuit Mutations

FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Improvements to the Evaluation of Quantified Boolean Formulae

IJCAI '99 Proceedings of the Sixteenth International Joint Conference on Artificial Intelligence
SAT-Encodings, Search Space Structure, and Local Search Performance

IJCAI '99 Proceedings of the Sixteenth International Joint Conference on Artificial Intelligence
Automatic Abstraction of Memories in the Formal Verification of Superscalar Microprocessors

TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
BDD Based Procedures for a Theory of Equality with Uninterpreted Functions

CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Formal Verification of VLIW Microprocessors with Speculative Execution

CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Combining Decision Diagrams and SAT Procedures for Efficient Symbolic Model Checking

CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Boolean Satisfiability with Transitivity Constraints

CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Automatic verification of Pipelined Microprocessor Control

CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
SATO: An Efficient Propositional Prover

CADE-14 Proceedings of the 14th International Conference on Automated Deduction
Integrating Equivalency Reasoning into Davis-Putnam Procedure

Proceedings of the Seventeenth National Conference on Artificial Intelligence and Twelfth Conference on Innovative Applications of Artificial Intelligence
Solving Hard Satisfiability Problems: A Unified Algorithm Based on Discrete Lagrange Multipliers

ICTAI '99 Proceedings of the 11th IEEE International Conference on Tools with Artificial Intelligence
Multi-resolution on compressed sets of clauses

ICTAI '00 Proceedings of the 12th IEEE International Conference on Tools with Artificial Intelligence
A satisfiability procedure for quantified boolean formulae

Discrete Applied Mathematics - The renesse issue on satisfiability
Heuristics based on unit propagation for satisfiability problems

IJCAI'97 Proceedings of the 15th international joint conference on Artifical intelligence - Volume 1
Using CSP look-back techniques to solve real-world SAT instances

AAAI'97/IAAI'97 Proceedings of the fourteenth national conference on artificial intelligence and ninth conference on Innovative applications of artificial intelligence
Solving satisfiability in combinational circuits with backtrack search and recursive learning

SBCCI'99 Proceedings of the XIIth conference on Integrated circuits and systems design
IGRAINE-an Implication GRaph-bAsed engINE for fast implication, justification, and propagation

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Chaff: engineering an efficient SAT solver

Proceedings of the 38th annual Design Automation Conference
Board-level multiterminal net assignment

Proceedings of the 12th ACM Great Lakes symposium on VLSI
sub-SAT: a formulation for relaxed boolean satisfiability with applications in routing

Proceedings of the 2002 international symposium on Physical design
Solving difficult SAT instances in the presence of symmetry

Proceedings of the 39th annual Design Automation Conference
SAT with partial clauses and back-leaps

Proceedings of the 39th annual Design Automation Conference
Boolean satisfiability with transitivity constraints

ACM Transactions on Computational Logic (TOCL)
Streaming BDD Manipulation

IEEE Transactions on Computers
Efficient conflict driven learning in a boolean satisfiability solver

Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Accelerating Random Walks

CP '02 Proceedings of the 8th International Conference on Principles and Practice of Constraint Programming
EVC: A Validity Checker for the Logic of Equality with Uninterpreted Functions and Memories, Exploiting Positive Equality, and Conservative Transformations

CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Modeling and Verifying Systems Using a Logic of Counter Arithmetic with Lambda Expressions and Uninterpreted Functions

CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Effective use of boolean satisfiability procedures in the formal verification of superscalar and VLIW microprocessors

Journal of Symbolic Computation
Generic ILP versus specialized 0-1 ILP: an update

Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
A hybrid SAT-based decision procedure for separation logic with uninterpreted functions

Proceedings of the 40th annual Design Automation Conference
RTL-Datapath Verification using Integer Linear Programming

ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
ARCHER: using symbolic, path-sensitive analysis to detect memory access errors

Proceedings of the 9th European software engineering conference held jointly with 11th ACM SIGSOFT international symposium on Foundations of software engineering
Board-level multiterminal net assignment for the partial cross-bar architecture

IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
Exploiting structure in symmetry detection for CNF

Proceedings of the 41st annual Design Automation Conference
Using Word-Level Information in Formal Hardware Verification

Automation and Remote Control
Local Search for Boolean Relations on the Basis of Unit Propagation

DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Validating SAT Solvers Using an Independent Resolution-Based Checker: Practical Implementations and Other Applications

DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
UnitWalk: A New SAT Solver that Uses Local Search Guided by Unit Clause Elimination

Annals of Mathematics and Artificial Intelligence
The SAT2002 Competition

Annals of Mathematics and Artificial Intelligence
Integration of supercubing and learning in a SAT solver

Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Dynamic symmetry-breaking for improved Boolean optimization

Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Efficient Symmetry Breaking for Boolean Satisfiability

IEEE Transactions on Computers
A fast SAT solver algorithm best suited to reconfigurable hardware

SBCCI '06 Proceedings of the 19th annual symposium on Integrated circuits and systems design
The state of SAT

Discrete Applied Mathematics
Regular-SAT: A many-valued approach to solving combinatorial problems

Discrete Applied Mathematics
Exploiting multivalued knowledge in variable selection heuristics for SAT solvers

Annals of Mathematics and Artificial Intelligence
Solution and Optimization of Systems of Pseudo-Boolean Constraints

IEEE Transactions on Computers
Ordered escape routing based on Boolean satisfiability

Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Building a Hybrid SAT Solver via Conflict-Driven, Look-Ahead and XOR Reasoning Techniques

SAT '09 Proceedings of the 12th International Conference on Theory and Applications of Satisfiability Testing
SymChaff: a structure-aware satisfiability solver

AAAI'05 Proceedings of the 20th national conference on Artificial intelligence - Volume 1
Generalizing Boolean satisfiability I: background and survey of existing work

Journal of Artificial Intelligence Research
Towards understanding and harnessing the potential of clause learning

Journal of Artificial Intelligence Research
Efficient symmetry breaking for boolean satisfiability

IJCAI'03 Proceedings of the 18th international joint conference on Artificial intelligence
Understanding the power of clause learning

IJCAI'03 Proceedings of the 18th international joint conference on Artificial intelligence
Experimental analysis of different techniques for bounded model checking

TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
Dynamic symmetry-breaking for Boolean satisfiability

Annals of Mathematics and Artificial Intelligence
A framework for testing hardware-software security architectures

Proceedings of the 26th Annual Computer Security Applications Conference
Distributed SAT

Artificial Intelligence Review
Boosting minimal unsatisfiable core extraction

Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
Fifty-five solvers in vancouver: the SAT 2004 competition

SAT'04 Proceedings of the 7th international conference on Theory and Applications of Satisfiability Testing
Zchaff2004: an efficient SAT solver

SAT'04 Proceedings of the 7th international conference on Theory and Applications of Satisfiability Testing
Assignment stack shrinking

SAT'10 Proceedings of the 13th international conference on Theory and Applications of Satisfiability Testing
A scalable algorithm for minimal unsatisfiable core extraction

SAT'06 Proceedings of the 9th international conference on Theory and Applications of Satisfiability Testing
Conflict anticipation in the search for graph automorphisms

LPAR'12 Proceedings of the 18th international conference on Logic for Programming, Artificial Intelligence, and Reasoning

Quantified Score

Hi-index	0.01

Visualization

Abstract

We compare SAT-checkers and decision diagrams on the evalua-tion of Boolean formulas produced in the formal verification of both correct and buggy versions of superscalar and VLIW micro-processors. We identify one SAT-checker that significantly out-performs the rest. We evaluate ways to enhance its performance by variations in the generation of the Boolean correctness formu-las. We reassess optimizations previously used to speed up the formal verification and probe future challenges.