GRASP: A Search Algorithm for Propositional Satisfiability
IEEE Transactions on Computers
A machine program for theorem-proving
Communications of the ACM
Solving satisfiability problems using reconfigurable computing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
A bitstream reconfigurable FPGA implementation of the WSAT algorithm
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
Proceedings of the 38th annual Design Automation Conference
Chaff: engineering an efficient SAT solver
Proceedings of the 38th annual Design Automation Conference
Run-time performance optimization of an FPGA-based deduction engine for SAT solvers
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Satisfiability on reconfigurable hardware
FPL '97 Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications
A Runtime Reconfigurable Implementation of the GSAT Algorithm
FPL '99 Proceedings of the 9th International Workshop on Field-Programmable Logic and Applications
Dynamic Circuit Generation for Solving Specific Problem Instances of Boolean Satisfiability
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
A Scalable, Loadable Custom Programmable Logic Device for Solving Boolean Satisfiability Problems
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
BerkMin: A Fast and Robust Sat-Solver
Proceedings of the conference on Design, automation and test in Europe
Dynamic Circuit Generation for Boolean Satisfiability in an Object-Oriented Design Environment
HICSS '99 Proceedings of the Thirty-Second Annual Hawaii International Conference on System Sciences-Volume 3 - Volume 3
Using configurable computing to accelerate boolean satisfiability
Using configurable computing to accelerate boolean satisfiability
Reconfigurable Hardware SAT Solvers: A Survey of Systems
IEEE Transactions on Computers
A software/reconfigurable hardware SAT solver
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A Configurable Hardware/Software Approach to SAT Solving
FCCM '01 Proceedings of the the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Fault Analysis and Test Generation for Programmable Logic Arrays (PLA's)
IEEE Transactions on Computers
Detection of Faults in Programmable Logic Arrays
IEEE Transactions on Computers
Towards understanding and harnessing the potential of clause learning
Journal of Artificial Intelligence Research
A clause-based heuristic for SAT solvers
SAT'05 Proceedings of the 8th international conference on Theory and Applications of Satisfiability Testing
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The majority of the existing reconfigurable hardware SAT solvers employ some variation of the Davis-Putnam algorithm; we propose a new algorithm for organizing the search in SAT Solvers best suited to reconfigurable architectures due to its vector-like operations. Its essence is to view each negated clause as a cube in the n-dimensional Boolean search space, and realizing that each of these clause-cubes denotes a sub-region of the search space where no satisfying assignments can be found. Starting from the universal cube, which represents the whole space, we systematically subtract all clause-cubes until we end up with a satisfying cube or an empty cube if the SAT formula is unsatisfiable. The algorithm for cube subtraction is the D-Sharp algorithm. We implemented this strategy in the well-known zChaff SAT solver. Improvements in execution time and number of aborted instances have been observed for the new algorithm. The test suite includes several instances from IBM-CNF BMC and Microprocessor's Formal Verification benchmarks. Given the breadth of the experimental software evaluation, we claim that D-Sharp subtraction search is an effective algorithm for improving the performance of SAT solvers and due to its data structure and bit-to-bit operations it is very well suited to reconfigurable hardware implementations. Design Automation (EDA).