DAC '98 Proceedings of the 35th annual Design Automation Conference
Dynamic Reconfiguration to Support Concurrent Applications
IEEE Transactions on Computers
A massively-parallel easily-scalable satisfiability solver using reconfigurable hardware
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Automatic Target Recognition with Dynamic Reconfiguration
Journal of VLSI Signal Processing Systems
A SAT Solver Using Reconfigurable Hardware and Virtual Logic
Journal of Automated Reasoning
A Scalable, Loadable Custom Programmable Logic Device for Solving Boolean Satisfiability Problems
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Security on FPGAs: State-of-the-art implementations and attacks
ACM Transactions on Embedded Computing Systems (TECS)
Reconfigurable Hardware SAT Solvers: A Survey of Systems
IEEE Transactions on Computers
A fast SAT solver algorithm best suited to reconfigurable hardware
SBCCI '06 Proceedings of the 19th annual symposium on Integrated circuits and systems design
Dynamic Fault Diagnosis of Combinational and Sequential Circuits on Reconfigurable Hardware
Journal of Electronic Testing: Theory and Applications
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Optimization and query problems provide the best clear opportunity for configurable computing systems to achieve a significant performance advantage over ASICs. Programmable hardware can be optimized to solve a specific problem instance that only needs to be solved once, and the circuit can be thrown away after its single execution. This paper investigates the applicability of this technology to solving a specific query problem, known as Boolean Satisfiability. We provide a system for capturing the complete execution cost of this approach, by accounting for CAD tool execution time. The key to this approach is to circumvent the standard CAD tools and directly generate circuits at runtime. A set of example circuits is presented as part of the system evaluation, and a complete implementation on the Xilinx XC6216 FPGA is presented.