GRASP—a new search algorithm for satisfiability
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Architectural and physical design challenges for one-million gate FPGAs and beyond
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
A Computing Procedure for Quantification Theory
Journal of the ACM (JACM)
Satisfiability on reconfigurable hardware
FPL '97 Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications
Solving Satisfiability Problems on FPGAs
FPL '96 Proceedings of the 6th International Workshop on Field-Programmable Logic, Smart Applications, New Paradigms and Compilers
Dynamic Circuit Generation for Solving Specific Problem Instances of Boolean Satisfiability
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
A massively-parallel easily-scalable satisfiability solver using reconfigurable hardware
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Dynamic fault diagnosis on reconfigurable hardware
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Boolean satisfiability in electronic design automation
Proceedings of the 37th Annual Design Automation Conference
A SAT Solver Using Reconfigurable Hardware and Virtual Logic
Journal of Automated Reasoning
A Scalable, Loadable Custom Programmable Logic Device for Solving Boolean Satisfiability Problems
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Instance-Specific Accelerators for Minimum Covering
The Journal of Supercomputing
Reconfigurable Hardware SAT Solvers: A Survey of Systems
IEEE Transactions on Computers
A software/reconfigurable hardware SAT solver
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Synthesis of FSMs on the basis of reusable hardware templates
ISTASC'06 Proceedings of the 6th WSEAS International Conference on Systems Theory & Scientific Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Efficient hardware algorithms for n choose k counters
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
A hardware relaxation paradigm for solving NP-hard problems
VoCS'08 Proceedings of the 2008 international conference on Visions of Computer Science: BCS International Academic Conference
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The Boolean satisfiability problem lies at the core of several CAD applications, including automatic test pattern generation and logic synthesis. This paper describes and evaluates an approach for accelerating Boolean satisfiability using configurable hardware. Our approach harnesses the increasing speed and capacity of field-programmable gate arrays by tailoring the SAT-solver circuit to the particular formula being solved. This input-specific technique gets high performance due both to (i) a direct mapping of Boolean operations to logic gates, and (ii) large amounts of fine-grain parallelism in the implication processing. Overall, these strategies yields impressive speedups (200X in many cases) compared to current software approaches, and they require only modest amounts of hardware. In a broader sense, this paper alerts the hardware design community to the increasing importance of input-specific designs, and documents their promise via a quantitative study of input-specific SAT solving.