TCP/IP illustrated (vol. 1): the protocols
TCP/IP illustrated (vol. 1): the protocols
Sequencing run-time reconfigured hardware with software
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
A FPGA-based implementation of a fault-tolerant neural architecture for photon identification
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
Dynamic Reconfiguration to Support Concurrent Applications
IEEE Transactions on Computers
A dynamic reconfiguration run-time system
FCCM '97 Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines
Hardware/Software Integration in Solar Polarimetry
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
Accelerating Boolean Satisfiability with Configurable Hardware
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
Dynamic Circuit Generation for Solving Specific Problem Instances of Boolean Satisfiability
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
Accelerating Adobe Photoshop with the Reconfigurable Logic
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
Data Buffering and Allocation in Mapping Generalized Template Matching on Reconfigurable Systems
The Journal of Supercomputing
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This paper describes the acceleration of an infrared automatic target recognition (IR ATR) application with a co-processor board that contains multiple field programmable gate array (FPGA) chips. Template and pixel level parallelism is exploited in an FPGA design for the bottleneck portion of the application. The implementation of this design achieved a speedup of 21 compared to running on the host processor. The paper then describes an FPGA resource manager (RM) developed to support concurrent applications sharing the FPGA board. With the RM, the system is dynamically reconfigurable. That is, while part of the co-processor board is busy computing, another part can be reconfigured for other purposes. The IR ATR application was ported to work with the RM and has been shown to adapt to the amount of reconfigurable hardware that is available at the time the application is executed.