Dynamic Reconfiguration to Support Concurrent Applications
IEEE Transactions on Computers
Automatic Target Recognition with Dynamic Reconfiguration
Journal of VLSI Signal Processing Systems
Reconfigurable computing: a survey of systems and software
ACM Computing Surveys (CSUR)
Reconfigurable Computing for Digital Signal Processing: A Survey
Journal of VLSI Signal Processing Systems
Designing Run-Time Reconfigurable Systems with JHDL
Journal of VLSI Signal Processing Systems
Development of a Run-Time Reconfiguration System with Low Reconfiguration Overhead
Journal of VLSI Signal Processing Systems
Formally Analyzed Dynamic Synthesis of Hardware
The Journal of Supercomputing
Partial Run-Time Reconfiguration Using JRTR
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
Interconnection Networks Enable Fine-Grain Dynamic Multi-tasking on FPGAs
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Multithreading for Logic-Centric Systems
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Chip-Based Reconfigurable Task Management
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
Accelerating Run-Time Reconfiguration on FCCMs
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
A Virtual Hardware Handler for RTR Systems
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
ACE card(tm): A High Performance Architecture for Run-Time Reconfiguration
IPPS '98 Proceedings of the 12th. International Parallel Processing Symposium on International Parallel Processing Symposium
An optimal algorithm for minimizing run-time reconfiguration delay
ACM Transactions on Embedded Computing Systems (TECS)
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Operating Systems for Reconfigurable Embedded Platforms: Online Scheduling of Real-Time Tasks
IEEE Transactions on Computers
Run-Time Reconfigurable Systems for Digital Signal Processing Applications: A Survey
Journal of VLSI Signal Processing Systems
Optimal reconfiguration sequence management
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Run-time reconfigurable systems for digital signal processing applications: a survey
Journal of VLSI Signal Processing Systems
Secure processing using dynamic partial reconfiguration
Proceedings of the 5th Annual Workshop on Cyber Security and Information Intelligence Research: Cyber Security and Information Intelligence Challenges and Strategies
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
ReconOS: Multithreaded programming for reconfigurable computers
ACM Transactions on Embedded Computing Systems (TECS)
Design and analysis of adaptive processor
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Occam-pi for programming of massively parallel reconfigurable architectures
International Journal of Reconfigurable Computing
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The feasibility of run-time reconfiguration of FPGAs has been established by a large number of case studies. However, these systems have typically involved an ad hoc combination of hardware and software. The software that manages the dynamic reconfiguration is typically specialised to one application and one hardware configuration. We present three different applications of dynamic reconfiguration, based on research activities at Glasgow University, and extract a set of common requirements. We present the design of an extensible run-time system for managing the dynamic reconfiguration of FPGAs, motivated by these requirements. The system is called RAGE, and incorporates operating-system style services that permit sophisticated and high level operations on circuits.