Application of Reconfigurable CORDIC Architectures
Journal of VLSI Signal Processing Systems - Special issue on VLSI on custom computing technology
StReAm: Object-Oriented Programming of Stream Architectures Using PAM-Blox
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
Reconfigurable Hardware SAT Solvers: A Survey of Systems
IEEE Transactions on Computers
A software/reconfigurable hardware SAT solver
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A fast SAT solver algorithm best suited to reconfigurable hardware
SBCCI '06 Proceedings of the 19th annual symposium on Integrated circuits and systems design
Interactive presentation: A shift register based clause evaluator for reconfigurable SAT solver
Proceedings of the conference on Design, automation and test in Europe
FPGA-based hardware acceleration for Boolean satisfiability
ACM Transactions on Design Automation of Electronic Systems (TODAES)
| Hi-index | 0.00 |
We apply our object-oriented design environment PAM-Blox to dynamic generation of circuits for recontigurable computing. Our approach combines the structural hardware design environment with commercial synthesis of finite state machines (FSMs). We integrate the advantages of an object-oriented design environment with control over placement at every level of abstraction, with commercial FSM synthesis and optimization.As driving application we consider recontigurable hardware accelerators for the NP-complete Boolean satisfiability problem. These accelerators require a fast compilation of circuits consisting of instancespecific datapaths and control automatons. By providing FSM optimization and control over placement, our design environment enables the optimization of performance.