Efficient Algorithms for Reconfiguration in VLSI/WSI Arrays
IEEE Transactions on Computers
Efficient generation of test patterns using Boolean satisfiability
Efficient generation of test patterns using Boolean satisfiability
FPGA routing and routability estimation via Boolean satisfiability
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Efficient algorithms for finding disjoint paths in grids
SODA '97 Proceedings of the eighth annual ACM-SIAM symposium on Discrete algorithms
Proceedings of the 38th annual Design Automation Conference
Monotonic parallel and orthogonal routing for single-layer ball grid array packages
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
A routing algorithm for flip-chip design
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
An integer linear programming based routing algorithm for flip-chip design
Proceedings of the 44th annual Design Automation Conference
Combinational test generation using satisfiability
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On using SAT to ordered escape problems
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
A correct network flow model for escape routing
Proceedings of the 46th Annual Design Automation Conference
B-escape: a simultaneous escape routing algorithm based on boundary routing
Proceedings of the 19th international symposium on Physical design
Ordered escape routing via routability-driven pin assignment
Proceedings of the 20th symposium on Great lakes symposium on VLSI
An optimal algorithm for finding disjoint rectangles and its application to PCB routing
Proceedings of the 47th Design Automation Conference
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Recent research development in PCB layout
Proceedings of the International Conference on Computer-Aided Design
On the escape routing of differential pairs
Proceedings of the International Conference on Computer-Aided Design
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Routing for high-speed boards is largely a time-consuming manual task today. In this work we consider the ordered escape routing problem which is a key problem in board-level routing. All existing approaches to this problem cannot guarantee to find a routing solution even if one exists. We present an algorithm to exactly solve this problem based on Boolean satisfiability. Experimental results on escape routing problems from industry show that our algorithm performs well.