Pin assignment and routing on a single-layer Pin Grid Array
ASP-DAC '95 Proceedings of the 1995 Asia and South Pacific Design Automation Conference
Single-layer fanout routing and routability analysis for Ball Grid Arrays
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Interchangeable pin routing with application to package layout
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Signal Integrity Issues and Printed Circuit Board Design
Signal Integrity Issues and Printed Circuit Board Design
Length-Matching Routing for High-Speed Printed Circuit Boards
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
A global routing method for 2-layer ball grid array packages
Proceedings of the 2005 international symposium on Physical design
Simultaneous escape routing and layer assignment for dense PCBs
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
A provably good algorithm for high performance bus routing
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Monotonic parallel and orthogonal routing for single-layer ball grid array packages
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
A routing algorithm for flip-chip design
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Printed Circuits Handbook
Layer minimization of escape routing in area array packaging
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
An integer linear programming based routing algorithm for flip-chip design
Proceedings of the 44th annual Design Automation Conference
Optimal bus sequencing for escape routing in dense PCBs
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Untangling twisted nets for bus routing
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Ordered escape routing based on Boolean satisfiability
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Novel pin assignment algorithms for components with very high pin counts
Proceedings of the conference on Design, automation and test in Europe
BSG-Route: a length-matching router for general topology
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Area-I/O flip-chip routing for chip-package co-design
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
On using SAT to ordered escape problems
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Theories and algorithms on single-detour routing for untangling twisted bus
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Automatic bus planner for dense PCBs
Proceedings of the 46th Annual Design Automation Conference
A correct network flow model for escape routing
Proceedings of the 46th Annual Design Automation Conference
An efficient pre-assignment routing algorithm for flip-chip designs
Proceedings of the 2009 International Conference on Computer-Aided Design
Optimal layer assignment for escape routing of buses
Proceedings of the 2009 International Conference on Computer-Aided Design
Equidistance routing in high-speed VLSI layout design
Integration, the VLSI Journal - Special issue: ACM great lakes symposium on VLSI
Complete PCB Design Using OrCAD Capture and PCB Editor
Complete PCB Design Using OrCAD Capture and PCB Editor
BSG-route: a length-constrained routing scheme for general planar topology
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
B-escape: a simultaneous escape routing algorithm based on boundary routing
Proceedings of the 19th international symposium on Physical design
Two-sided single-detour untangling for bus routing
Proceedings of the 47th Design Automation Conference
An optimal algorithm for finding disjoint rectangles and its application to PCB routing
Proceedings of the 47th Design Automation Conference
Optimal simultaneous pin assignment and escape routing for dense PCBs
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Algorithmic study of single-layer bus routing for high-speed boards
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Global routing by iterative improvements for two-layer ball grid array packages
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Algorithms for simultaneous escape routing and Layer assignment of dense PCBs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A Length-Matching Routing Algorithm for High-Performance Printed Circuit Boards
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A Network-Flow-Based RDL Routing Algorithmz for Flip-Chip Design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Simultaneous Escape-Routing Algorithms for Via Minimization of High-Speed Boards
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Escape routing for staggered-pin-array PCBs
Proceedings of the International Conference on Computer-Aided Design
Escape routing of mixed-pattern signals based on staggered-pin-array PCBs
Proceedings of the 2013 ACM international symposium on International symposium on physical design
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The increasing complexity of electronic systems has made PCB layout a difficult problem. A large amount of research efforts are dedicated to the study of this problem. In this paper, we provide an overview of recent research results on the PCB layout problem. We focus on the escape routing problem and the length-matching routing problem, which are the two most important problems in PCB layout. Other relevant works are also briefly introduced.