Journal of the ACM (JACM) - The MIT Press scientific computation series
Combinatorial optimization: algorithms and complexity
Combinatorial optimization: algorithms and complexity
On the routability of a convex grid
Journal of Algorithms
Efficient Algorithms for Reconfiguration in VLSI/WSI Arrays
IEEE Transactions on Computers
Introduction to algorithms
How to play bowling in parallel on the grid
Journal of Algorithms
A Network Flow Approach to the Reconfiguration of VLSI Arrays
IEEE Transactions on Computers
Finding $k$ Disjoint Paths in a Directed Planar Graph
SIAM Journal on Computing
Faster shortest-path algorithms for planar graphs
STOC '94 Proceedings of the twenty-sixth annual ACM symposium on Theory of computing
The vertex-disjoint menger problem in planar graphs
SODA '93 Proceedings of the fourth annual ACM-SIAM Symposium on Discrete algorithms
Finding Steiner forests in planar graphs
SODA '90 Proceedings of the first annual ACM-SIAM symposium on Discrete algorithms
On finding non-intersecting paths in grids and its application in reconfiguring VLSI/WSI arrays
SODA '90 Proceedings of the first annual ACM-SIAM symposium on Discrete algorithms
Connecting the Maximum Number of Grid Nodes to the Boundary with Non-Intersecting Line Segments
SWAT '94 Proceedings of the 4th Scandinavian Workshop on Algorithm Theory
Flows in Networks
Efficient breakout routing in printed circuit boards
SCG '97 Proceedings of the thirteenth annual symposium on Computational geometry
A Faster Algorithm for Finding Disjoint Paths in Grids
ISAAC '99 Proceedings of the 10th International Symposium on Algorithms and Computation
Ordered escape routing based on Boolean satisfiability
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
On using SAT to ordered escape problems
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
B-escape: a simultaneous escape routing algorithm based on boundary routing
Proceedings of the 19th international symposium on Physical design
Ordered escape routing via routability-driven pin assignment
Proceedings of the 20th symposium on Great lakes symposium on VLSI
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