Network flows: theory, algorithms, and applications
Network flows: theory, algorithms, and applications
PathFinder: a negotiation-based performance-driven router for FPGAs
FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays
Pin assignment and routing on a single-layer Pin Grid Array
ASP-DAC '95 Proceedings of the 1995 Asia and South Pacific Design Automation Conference
Single-layer fanout routing and routability analysis for Ball Grid Arrays
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Interchangeable pin routing with application to package layout
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
DAC '78 Proceedings of the 15th Design Automation Conference
A global routing method for 2-layer ball grid array packages
Proceedings of the 2005 international symposium on Physical design
Monotonic parallel and orthogonal routing for single-layer ball grid array packages
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Layer minimization of escape routing in area array packaging
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
An integer linear programming based routing algorithm for flip-chip design
Proceedings of the 44th annual Design Automation Conference
Ordered escape routing based on Boolean satisfiability
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Routing for chip-package-board co-design considering differential pairs
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Area-I/O flip-chip routing for chip-package co-design
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
A correct network flow model for escape routing
Proceedings of the 46th Annual Design Automation Conference
Global routing by iterative improvements for two-layer ball grid array packages
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A Network-Flow-Based RDL Routing Algorithmz for Flip-Chip Design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Escape routing of mixed-pattern signals based on staggered-pin-array PCBs
Proceedings of the 2013 ACM international symposium on International symposium on physical design
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As an important step in PCB design, the escape routing problem has been extensively studied in literature. However, few studies have been done on the escape routing of differential pairs. In this paper, we study the differential pair escape routing problem and propose two algorithms. The first one computes the optimal routing for a single differential pair while the second one is able to simultaneously route multiple differential pairs considering both routability and wire length. We then propose a two-stage routing scheme based on the two algorithms. Experimental results show that our routing scheme efficiently and effectively solves the differential pair escape routing test cases we obtained from industry.