Communicating sequential processes
Communicating sequential processes
Real-time systems and their programming languages
Real-time systems and their programming languages
Calculating the maximum, execution time of real-time programs
Real-Time Systems
Predicting program execution times by analyzing static and dynamic program paths
Real-Time Systems - Special issue: Real-time languages and language-level timing tools and analysis
Computer organization & design: the hardware/software interface
Computer organization & design: the hardware/software interface
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
The Ravenscar tasking profile for high integrity real-time programs
Proceedings of the 1998 annual ACM SIGAda international conference on Ada
Performance Analysis of Real-Time Embeded Software
Performance Analysis of Real-Time Embeded Software
The Real-Time Specification for Java
The Real-Time Specification for Java
The Garp Architecture and C Compiler
Computer
Pebble: A Language for Parametrised and Reconfigurable Hardware Design
FPL '98 Proceedings of the 8th International Workshop on Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm
SL - A Structural Hardware Design Language
FPL '99 Proceedings of the 9th International Workshop on Field-Programmable Logic and Applications
A Method to Improve the Estimated Worst-Case Performance of Data Caching
RTCSA '99 Proceedings of the Sixth International Conference on Real-Time Computing Systems and Applications
Integrating the timing analysis of pipelining and instruction caching
RTSS '95 Proceedings of the 16th IEEE Real-Time Systems Symposium
A Worst Case Timing Analysis Technique for Multiple-Issue Machines
RTSS '98 Proceedings of the IEEE Real-Time Systems Symposium
The Transmogrifier C hardware description language and compiler for FPGAs
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
Hardware implementation of the Ravenscar Ada tasking profile
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
Language issues of compiling Ada to hardware
IRTAW '02 Proceedings of the 11th international workshop on Real-time Ada workshop
Language Issues of Compiling Ada to Hardware
Ada-Europe '02 Proceedings of the 7th Ada-Europe International Conference on Reliable Software Technologies
JTRES '06 Proceedings of the 4th international workshop on Java technologies for real-time and embedded systems
Suggestions for stream based parallel systems in Ada
IRTAW '07 Proceedings of the 13th international workshop on Real-time Ada
Flexible design of complex high-integrity systems using trade offs
HASE'04 Proceedings of the Eighth IEEE international conference on High assurance systems engineering
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Normal implementations of real-time systems on conventional processors are becoming much more difficult to prove correct to their timing specification. This is due to the complexity of modern processors (e.g. the worst case execution time of a program becomes hard to calculate in the presence of CPU speed up features such as caches and pipelines).Field Programmable Gate Arrays (FPGAs) provide a way to ease this problem by providing an implementation medium that has a simple timing model. However there is no support for real-time languages on FPGAs.This paper describes a compiler for a sequential subset of Ada95, concentrating upon compilation of subprograms and statements. It is shown how the resulting circuits give simple timing analysis. Extensions to the current compiler are explored to give support for a larger range of types and a predictable subset of the Ada95 concurrency model.