Performance characterization of a Quad Pentium Pro SMP using OLTP workloads
Proceedings of the 25th annual international symposium on Computer architecture
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
Billion-Transistor Architectures
Computer
Computer
DSP Processors Hit the Mainstream
Computer
The Memory Performance of DSS Commercial Workloads in Shared-Memory Multiprocessors
HPCA '97 Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture
Simple vector microprocessors for multimedia applications
MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
Microservers: a new memory semantics for massively parallel computing
ICS '99 Proceedings of the 13th international conference on Supercomputing
Octopus: embracing the energy efficiency of handheld multimedia computers
MobiCom '99 Proceedings of the 5th annual ACM/IEEE international conference on Mobile computing and networking
DATE '00 Proceedings of the conference on Design, automation and test in Europe
A Parallel Algorithm for Volume Projections on SIMD Mesh-Connected Computers
The Journal of Supercomputing
Variability in the execution of multimedia applications and implications for architecture
ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
Systems support for scalable data mining
ACM SIGKDD Explorations Newsletter - Special issue on “Scalable data mining algorithms”
Prefetching for improved bus wrapper performance in cores
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A Java based XML browser for consumer devices
Proceedings of the 2002 ACM symposium on Applied computing
Towards nanocomputer architecture
CRPIT '02 Proceedings of the seventh Asia-Pacific conference on Computer systems architecture
Saving energy with architectural and frequency adaptations for multimedia applications
Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture
Joint local and global hardware adaptations for energy
Proceedings of the 10th international conference on Architectural support for programming languages and operating systems
Evaluation of Neural and Genetic Algorithms for Synthesizing Parallel Storage Schemes
International Journal of Parallel Programming
Tuning Buffer Size in the Multimedia Router (MMR)
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
A Requirements Analysis for Parallel KDD Systems
IPDPS '00 Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed Processing
A Two Dimensional Vector Architecture for Multimedia
Euro-Par '01 Proceedings of the 7th International Euro-Par Conference Manchester on Parallel Processing
Performance Evaluation and Benchmarking of Native Signal Processing
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
Configurable parallel memory architecture for multimedia computers
Journal of Systems Architecture: the EUROMICRO Journal
Improved indexing for cache miss reduction in embedded systems
Proceedings of the 40th annual Design Automation Conference
Predictive dynamic thermal management for multimedia applications
ICS '03 Proceedings of the 17th annual international conference on Supercomputing
Pipeline Vectorization for Reconfigurable Systems
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
QUIC: A Quality of Service Network Interface Layer for Communication in NOWs
HCW '99 Proceedings of the Eighth Heterogeneous Computing Workshop
Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Xtensa with User Defined DSP Coprocessor Microarchitectures
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Near Fine Grain Parallel Processing Using Static Scheduling on Single Chip Multiprocessors
IWIA '99 Proceedings of the 1999 International Workshop on Innovative Architecture
CODACS Prototype: CHIARA Language and Its Compilers
ICDCSW '04 Proceedings of the 24th International Conference on Distributed Computing Systems Workshops - W7: EC (ICDCSW'04) - Volume 7
Evaluation of the Raw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams
Proceedings of the 31st annual international symposium on Computer architecture
Cache Optimization For Embedded Processor Cores: An Analytical Approach
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Array organization in parallel memories
International Journal of Parallel Programming
Analytical Design Space Exploration of Caches for Embedded Systems
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Cache optimization for embedded processor cores: An analytical approach
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Encyclopedia of Computer Science
Zero cost indexing for improved processor cache performance
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Cross-profiling for Java processors
Software—Practice & Experience
Designing a java microcontroller to specific applications
SBCCI'99 Proceedings of the XIIth conference on Integrated circuits and systems design
An information-theoretic approach to estimate the capacity of processing units
Performance Evaluation
Parallelization of multimedia applications on the multi-level computing architecture
Journal of Embedded Computing
| Hi-index | 4.10 |
In the past few years, two important trends have evolved that could change the shape of computing: multimedia applications and portable electronics. Together, these trends will lead to a personal mobile-computing environment, a small device carried all the time that incorporates the functions of the pager, cellular phone, laptop computer, PDA, digital camera, and video game. The microprocessor needed for these devices is actually a merged general-purpose processor and digital-signal processor, with the power budget of the latter. Yet for almost two decades, architecture research has focused on desktop or server machines. We are designing processors of the future with a heavy bias toward the past. To design successful processor architectures for the future, we first need to explore future applications and match their requirements in a scalable, cost-effective way. The authors describe Vector IRAM, an initial approach in this direction, and challenge others in the very successful computer architecture community to investigate architectures with a heavy bias for the future.