Genetic programming: on the programming of computers by means of natural selection
Genetic programming: on the programming of computers by means of natural selection
Genetic programming II: automatic discovery of reusable programs
Genetic programming II: automatic discovery of reusable programs
A compiling genetic programming system that directly manipulates the machine code
Advances in genetic programming
AVPGEN—a test generator for architecture verification
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Some studies in machine learning using the game of checkers
Computers & thought
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
High-level test generation for design verification of pipelined microprocessors
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Advances in genetic programming
On the test of microprocessor IP cores
Proceedings of the conference on Design, automation and test in Europe
Validating the intel pentium 4 microprocessor
Proceedings of the 38th annual Design Automation Conference
The DLX Instruction Set Architecture Handbook
The DLX Instruction Set Architecture Handbook
Evolving Routing Algorithms with the JBGP-System
EvoIASP '99/EuroEcTel '99 Proceedings of the First European Workshops on Evolutionary Image Analysis, Signal Processing and Telecommunications
Evolving Turing-Complete Programs for a Register Machine with Self-modifying Code
Proceedings of the 6th International Conference on Genetic Algorithms
Linear-Graph GP - A New GP Structure
EuroGP '02 Proceedings of the 5th European Conference on Genetic Programming
Combinational equivalence checking through function transformation
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Evolutionary Test Program Induction for Microprocessor Design Verification
ATS '02 Proceedings of the 11th Asian Test Symposium
LICS '03 Proceedings of the 18th Annual IEEE Symposium on Logic in Computer Science
Superscalar Processor Validation at the Microarchitecture Level
VLSID '99 Proceedings of the 12th International Conference on VLSI Design - 'VLSI for the Information Appliance'
Proceedings of the conference on Design, automation and test in Europe
Automatic test program generation for pipelined processors
Proceedings of the 2003 ACM symposium on Applied computing
Improving SAT-Based Bounded Model Checking by Means of BDD-Based Approximate Traversals
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Fully Automatic Test Program Generation for Microprocessor Cores
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Efficient machine-code test-program induction
CEC '02 Proceedings of the Evolutionary Computation on 2002. CEC '02. Proceedings of the 2002 Congress - Volume 02
Exploiting auto-adaptive µGP for highly effective test programs generation
ICES'03 Proceedings of the 5th international conference on Evolvable systems: from biology to hardware
New evolutionary techniques for test-program generation for complex microprocessor cores
GECCO '05 Proceedings of the 7th annual conference on Genetic and evolutionary computation
An effective technique for minimizing the cost of processor software-based diagnosis in SoCs
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Efficient techniques for automatic verification-oriented test set optimization
International Journal of Parallel Programming
Journal of Electronic Testing: Theory and Applications
Feedback-based coverage directed test generation: an industrial evaluation
HVC'10 Proceedings of the 6th international conference on Hardware and software: verification and testing
Proceedings of the 13th annual conference companion on Genetic and evolutionary computation
Learning microarchitectural behaviors to improve stimuli generation quality
Proceedings of the 48th Design Automation Conference
Automatic completion and refinement of verification sets for microprocessor cores
EC'05 Proceedings of the 3rd European conference on Applications of Evolutionary Computing
Bayesian network structure learning from limited datasets through graph evolution
EuroGP'12 Proceedings of the 15th European conference on Genetic Programming
Novel test detection to improve simulation efficiency: a commercial experiment
Proceedings of the International Conference on Computer-Aided Design
Simulation knowledge extraction and reuse in constrained random processor verification
Proceedings of the 50th Annual Design Automation Conference
A novel approach for implementing microarchitectural verification plans in processor designs
HVC'12 Proceedings of the 8th international conference on Hardware and Software: verification and testing
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This paper describes 驴GP, an evolutionary approach for generating assembly programs tuned for a specific microprocessor. The approach is based on three clearly separated blocks: an evolutionary core, an instruction library and an external evaluator. The evolutionary core conducts adaptive population-based search. The instruction library is used to map individuals to valid assembly language programs. The external evaluator simulates the assembly program, providing the necessary feedback to the evolutionary core. 驴GP has some distinctive features that allow its use in specific contexts. This paper focuses on one such context: test program generation for design validation of microprocessors. Reported results show 驴GP being used to validate a complex 5-stage pipelined microprocessor. Its induced test programs outperform an exhaustive functional test and an instruction randomizer, showing that engineers are able to automatically obtain high-quality test programs.