Simulation knowledge extraction and reuse in constrained random processor verification

  • Authors:
  • Wen Chen;Li-Chung Wang;Jay Bhadra;Magdy Abadir

  • Affiliations:
  • University of California - Santa Barbara;University of California - Santa Barbara;Freescale Semiconduction Inc.;Freescale Semiconduction Inc.

  • Venue:
  • Proceedings of the 50th Annual Design Automation Conference
  • Year:
  • 2013

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Abstract

This work proposes a methodology of knowledge extraction from constrained-random simulation data. Feature-based analysis is employed to extract rules describing the unique properties of novel assembly programs hitting special conditions. The knowledge learned can be reused to guide constrained-random test generation towards uncovered corners. The experiments are conducted based on the verification environment of a commercial processor design, in parallel with the on-going verification efforts. The experimental results show that by leveraging the knowledge extracted from constrained-random simulation, we can improve the test templates to activate the assertions that otherwise are difficult to activate by extensive simulation.