Software-based diagnosis for processors
Proceedings of the 39th annual Design Automation Conference
Full fault dictionary storage based on labeled tree encoding
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
A sampling technique for diagnostic fault simulation
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
Testing of Digital Systems
Automatic Test Program Generation: A Case Study
IEEE Design & Test
On the Transformation of Manufacturing Test Sets into On-Line Test Sets for Microprocessors
DFT '05 Proceedings of the 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
MicroGP—An Evolutionary Assembly Program Generator
Genetic Programming and Evolvable Machines
Using Infrastructure IPs to Support SW-Based Self-Test of Processor Cores
MTV '04 Proceedings of the Fifth International Workshop on Microprocessor Test and Verification
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the conference on Design, automation and test in Europe
A System-layer Infrastructure for SoC Diagnosis
Journal of Electronic Testing: Theory and Applications
System-on-Chip Test Architectures: Nanometer Design for Testability
System-on-Chip Test Architectures: Nanometer Design for Testability
Address Sequences and Backgrounds with Different Hamming Distances for Multiple Run March Tests
International Journal of Applied Mathematics and Computer Science - Selected Problems of Computer Science and Control
Machine learning-based volume diagnosis
Proceedings of the Conference on Design, Automation and Test in Europe
Evolutionary design of message efficient secrecy amplification protocols
EuroGP'12 Proceedings of the 15th European conference on Genetic Programming
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The ever increasing usage of microprocessor devices is sustained by a high volume production that in turn requires a high production yield, backed by a controlled process. Fault diagnosis is an integral part of the industrial effort towards these goals. This paper presents a novel cost-effective approach to the construction of diagnostic software-based test sets for microprocessors. The methodology exploits an existing post-production test set, designed for software-based self-test, and an already developed infrastructure IP to perform the diagnosis. An initial diagnostic test set is built, and then iteratively refined resorting to an evolutionary method. Experimental results are reported in the paper showing the feasibility and effectiveness of the approach for an Intel i8051 processor core.