Translating concurrent communicating programs into asynchronous circuits
Translating concurrent communicating programs into asynchronous circuits
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
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Numerical Methods Using MATLAB
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RSP '02 Proceedings of the 13th IEEE International Workshop on Rapid System Prototyping (RSP'02)
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Parameterised floating-point arithmetic on FPGAs
ICASSP '01 Proceedings of the Acoustics, Speech, and Signal Processing, 200. on IEEE International Conference - Volume 02
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In this paper we present the "fly" hardware compiler for rapid system prototyping research. Fly takes a C-like program as input and produces a synthesizable VHDL description of a one-hot state machine and the associated data path elements as output. Furthermore, it is tightly integrated with the hardware design environment and implementation platform, and is able to hide issues associated with these tools from the user. Unlike previous tools, fly encourages modification of the compiler for research in rapid system prototyping and code generation, and the full source code to the compiler is presented in the paper. Case studies involving the implementation of an FPGA based greatest common divisor (GCD) coprocessor as well as the extension of the basic fly compiler to solve a differential equation using floating point arithmetic are presented.