Checkpoint repair for high-performance out-of-order execution machines
IEEE Transactions on Computers
Implementing Precise Interrupts in Pipelined Processors
IEEE Transactions on Computers
Operating system design. Vol. 1: the XINU approach (PC edition)
Operating system design. Vol. 1: the XINU approach (PC edition)
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
IEEE Micro
Interrupt Handling for Out-of-Order Execution Processors
IEEE Transactions on Computers
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A new study compares the architectural design and implementation costs of five strategies that let pipelined processors support precise interrupts. Hardware dominates the cost of all strategies except checkpoint repair, which, depending on the implementation, can incur either high software or hardware costs.