Fast Controllers for Data Dominated Applications

  • Authors:
  • Andre Hertwig;Hans-Joachim Wunderlich

  • Affiliations:
  • University of Stuttgart, Germany, Computer Architecture Lab;University of Stuttgart, Germany, Computer Architecture Lab

  • Venue:
  • EDTC '97 Proceedings of the 1997 European conference on Design and Test
  • Year:
  • 1997

Quantified Score

Hi-index 0.00

Visualization

Abstract

A target structure for implementing fast edge-triggered control units is presented. In many cases, the proposed controller is faster than a one-hot encoded structure as its correct timing does not require master-slave flip-flops even in the presence of unpredictable clocking skews. A synthesis procedure is proposed which leads to a performance improvement of 40% on average for the standard benchmark set whereas the additional area is less than 25% compared with conventional finite state machine (FSM) synthesis. The proposed approach is compatible with the state-of-the-art methods for FSM decomposition, state encoding and logic synthesis.