Algorithms & data structures
The impact of interprocedural analysis and optimization in the Rn programming environment
ACM Transactions on Programming Languages and Systems (TOPLAS)
Register allocation in the SPUR Lisp compiler
SIGPLAN '86 Proceedings of the 1986 SIGPLAN symposium on Compiler construction
Register allocation by priority-based coloring
SIGPLAN '84 Proceedings of the 1984 SIGPLAN symposium on Compiler construction
Computer Methods for Mathematical Computations
Computer Methods for Mathematical Computations
An overview of the PL.8 compiler
SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
Register allocation & spilling via graph coloring
SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
A portable machine-independent global optimizer--design and measurements
A portable machine-independent global optimizer--design and measurements
Graph coloring register allocation for processors with multi-register operands
PLDI '90 Proceedings of the ACM SIGPLAN 1990 conference on Programming language design and implementation
Integrating register allocation and instruction scheduling for RISCs
ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems
Optimization of array accesses by collective loop transformations
ICS '91 Proceedings of the 5th international conference on Supercomputing
CCG: a prototype coagulating code generator
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
Register allocation via hierarchical graph coloring
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
The Marion system for retargetable instruction scheduling
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
The effect on RISC performance of register set size and structure versus code generation strategy
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Subprogram Inlining: A Study of its Effects on Program Execution Time
IEEE Transactions on Software Engineering
ACM Letters on Programming Languages and Systems (LOPLAS)
Probabilistic register allocation
PLDI '92 Proceedings of the ACM SIGPLAN 1992 conference on Programming language design and implementation
PLDI '92 Proceedings of the ACM SIGPLAN 1992 conference on Programming language design and implementation
Load/store range analysis for global register allocation
PLDI '93 Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation
New approximation algorithms for graph coloring
Journal of the ACM (JACM)
Register allocation over the program dependence graph
PLDI '94 Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation
Reducing memory traffic with CRegs
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
Interprocedural register allocation for lazy functional languages
FPCA '95 Proceedings of the seventh international conference on Functional programming languages and computer architecture
Optimal register assignment to loops for embedded code generation
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Register allocation for predicated code
Proceedings of the 28th annual international symposium on Microarchitecture
Real-time scheduling of multimedia data retrieval to minimize buffer requirement
ACM SIGOPS Operating Systems Review
Software pipelining showdown: optimal vs. heuristic methods in a production compiler
PLDI '96 Proceedings of the ACM SIGPLAN 1996 conference on Programming language design and implementation
Source-level debugging of scalar optimized code
PLDI '96 Proceedings of the ACM SIGPLAN 1996 conference on Programming language design and implementation
Optimal register assignment to loops for embedded code generation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Demand-driven register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Code reuse in an optimizing compiler
Proceedings of the 11th ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications
A register allocation technique using guarded PDG
ICS '96 Proceedings of the 10th international conference on Supercomputing
Minimum cost interprocedural register allocation
POPL '96 Proceedings of the 23rd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Heuristics for register-constrained software pipelining
Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
Spill code minimization via interference region spilling
Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation
Call-cost directed register allocation
Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation
Approximate graph coloring by semidefinite programming
Journal of the ACM (JACM)
Fast, effective code generation in a just-in-time Java compiler
PLDI '98 Proceedings of the ACM SIGPLAN 1998 conference on Programming language design and implementation
Decoupling local variable accesses in a wide-issue superscalar processor
ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
Graph coloring algorithms for fast evaluation of Curtis decompositions
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Register allocation in structured programs
Proceedings of the sixth annual ACM-SIAM symposium on Discrete algorithms
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Achieving efficient register allocation via parallelism
SAC '95 Proceedings of the 1995 ACM symposium on Applied computing
Efficient and safe-for-space closure conversion
ACM Transactions on Programming Languages and Systems (TOPLAS)
Improved spill code generation for software pipelined loops
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
Fusion-based register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Loop Transformations for Architectures with Partitioned Register Banks
OM '01 Proceedings of the 2001 ACM SIGPLAN workshop on Optimization of middleware and distributed systems
Loop fusion for clustered VLIW architectures
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Global array reference allocation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Computation in the Context of Transport Triggered Architectures
International Journal of Parallel Programming
IEEE Transactions on Computers
A Method for Register Allocation to Loops in Multiple Register File Architectures
IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
A Spill Code Placement Framework for Code Scheduling
LCPC '98 Proceedings of the 11th International Workshop on Languages and Compilers for Parallel Computing
Optimizing Loop Performance for Clustered VLIW Architectures
Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques
Array Reference Allocation Using SSA-Form and Live Range Growth
LCTES '00 Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems
Advanced Compiler Optimization for Calm RISC8 Low-End Embedded Processor
CC '00 Proceedings of the 9th International Conference on Compiler Construction
Optimal Live Range Merge for Address Register Allocation in Embedded Programs
CC '01 Proceedings of the 10th International Conference on Compiler Construction
Speculative register promotion using Advanced Load Address Table (ALAT)
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
Static array storage optimization in MATLAB
PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation
Fast Controllers for Data Dominated Applications
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Register Constrained Modulo Scheduling
IEEE Transactions on Parallel and Distributed Systems
Improving register allocation for subscripted variables
ACM SIGPLAN Notices - Best of PLDI 1979-1999
A retargetable register allocation framework for embedded processors
Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
A fast, memory-efficient register allocation framework for embedded systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
Automatic tiling of iterative stencil loops
ACM Transactions on Programming Languages and Systems (TOPLAS)
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Profile-based global live-range splitting
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
Tetris: a new register pressure control technique for VLIW processors
Proceedings of the 2007 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Exploiting hierarchy and structure to efficiently solve graph coloring as SAT
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Exploiting idle register classes for fast spill destination
Proceedings of the 22nd annual international conference on Supercomputing
Tetris-XL: A performance-driven spill reduction technique for embedded VLIW processors
ACM Transactions on Architecture and Code Optimization (TACO)
MIRS: modulo scheduling with integrated register spilling
LCPC'01 Proceedings of the 14th international conference on Languages and compilers for parallel computing
Register allocation with instruction scheduling for VLIW-architectures
Programming and Computing Software
Integrated instruction scheduling and fine-grain register allocation for embedded processors
SAMOS'06 Proceedings of the 6th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Hybrid optimizations: which optimization algorithm to use?
CC'06 Proceedings of the 15th international conference on Compiler Construction
Performance characterization of the 64-bit x86 architecture from compiler optimizations' perspective
CC'06 Proceedings of the 15th international conference on Compiler Construction
Scheduling expression DAGs for minimal register need
Computer Languages
A decoupled non-SSA global register allocation using bipartite liveness graphs
ACM Transactions on Architecture and Code Optimization (TACO)
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We describe an improvement to a heuristic introduced by Chaitin for use in graph coloring register allocation. Our modified heuristic produces better colorings, with less spill code. It has similar compile-time and implementation requirements. We present experimental data to compare the two methods.