REAL: a program for REgister ALlocation
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Coloring heuristics for register allocation
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
On the Minimization of Loads/Stores in Local Register Allocation
IEEE Transactions on Software Engineering
The priority-based coloring approach to register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Utilization of multiport memories in data path synthesis
DAC '93 Proceedings of the 30th international Design Automation Conference
Register allocation via graph coloring
Register allocation via graph coloring
Register assignment through resource classification for ASIP microcode generation
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Data routing: a paradigm for efficient data-path synthesis and code generation
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
An integrated approach to retargetable code generation
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
Tree-based mapping of algorithms to predefined structures
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Journal of the ACM (JACM)
A Register Allocation Framework Based on Hierarchical Cyclic Interval Graphs
CC '92 Proceedings of the 4th International Conference on Compiler Construction
Interconnect optimisation during data path allocation
EURO-DAC '90 Proceedings of the conference on European design automation
Low energy memory and register allocation using network flow
DAC '97 Proceedings of the 34th annual Design Automation Conference
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A Method for Register Allocation to Loops in Multiple Register File Architectures
IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
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Abstract: One of the challenging tasks in code generation for embedded systems is register assignment. When more live variables than registers exist, some variables are necessarily accessed from data memory. Because loops are typically executed many times and are often time-critical, good register assignment in loops is exceedingly important, since accessing data memory can degrade performance. The issue of finding an optimal register assignment to loops, one which minimizes the number of spills between registers and memory, has been open for some time. In this paper, we address this issue and present an optimal, but exponential, algorithm which assigns registers to loop bodies such that the resulting spill code is minimal. We also show that a heuristic modification performs as well as the exponential approach on typical loops from scientific code.