REAL: a program for REgister ALlocation
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Data path allocation based on bipartite weighted matching
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
High-level synthesis: introduction to chip and system design
High-level synthesis: introduction to chip and system design
The mimola design system: Tools for the design of digital processors
DAC '84 Proceedings of the 21st Design Automation Conference
Interconnect optimisation during data path allocation
EURO-DAC '90 Proceedings of the conference on European design automation
Minimization of memory traffic in high-level synthesis
DAC '94 Proceedings of the 31st annual Design Automation Conference
Optimal register assignment to loops for embedded code generation
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Array mapping in behavioral synthesis
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Optimal register assignment to loops for embedded code generation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Exploiting off-chip memory access modes in high-level synthesis
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
A flexible datapath allocation method for architectural synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Memory binding for performance optimization of control-flow intensive behaviors
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
High-level library mapping for memories
ACM Transactions on Design Automation of Electronic Systems (TODAES)
On-chip vs. off-chip memory: the data partitioning problem in embedded processor-based systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Hierarchical memory mapping during synthesis in FPGA-based reconfigurable computers
Proceedings of the conference on Design, automation and test in Europe
Data and memory optimization techniques for embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Global memory mapping for FPGA-based reconfigurable systems
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
An energy-conscious algorithm for memory port allocation
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Architectural exploration for datapaths with memory hierarchy
EDTC '95 Proceedings of the 1995 European conference on Design and Test
EDTC '97 Proceedings of the 1997 European conference on Design and Test
A Graph-Theoretic Approach for Register File Based Synthesis
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Memory binding for performance optimization of control-flow intensive behavioral descriptions
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Compatibility path based binding algorithm for interconnect reduction in high level synthesis
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Reducing Memory Constraints in Modulo Scheduling Synthesis for FPGAs
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
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