Bulldog: a compiler for VLSI architectures
Bulldog: a compiler for VLSI architectures
PLDI '92 Proceedings of the ACM SIGPLAN 1992 conference on Programming language design and implementation
DSP design tool requirements for embedded systems: a telecommunications industrial perspective
Journal of VLSI Signal Processing Systems - Special issue on design environments for DSP
Execution interval analysis under resource constraints
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Register allocation & spilling via graph coloring
SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
Interconnect optimisation during data path allocation
EURO-DAC '90 Proceedings of the conference on European design automation
PHIDEO: a silicon compiler for high speed algorithms
EURO-DAC '91 Proceedings of the conference on European design automation
Register assignment through resource classification for ASIP microcode generation
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Design of heterogeneous ICs for mobile and personal communication systems
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Register minimization beyond sharing among variables
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Constrained register allocation in bus architectures
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Conflict modelling and instruction scheduling in code generation for in-house DSP cores
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Optimal register assignment to loops for embedded code generation
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Industrial experience using rule-driven retargetable code generation for multimedia applications
ISSS '95 Proceedings of the 8th international symposium on System synthesis
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Optimal register assignment to loops for embedded code generation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Using register-transfer paths in code generation for heterogeneous memory-register architectures
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Recent developments in high-level synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Instruction set definition and instruction selection for ASIPs
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
The DT-model: high-level synthesis using data transfers
DAC '98 Proceedings of the 35th annual Design Automation Conference
Code generation for fixed-point DSPs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Exploiting conditional instructions in code generation for embedded VLIW processors
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Constraint driven code selection for fixed-point DSPs
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Embedded software in real-time signal processing systems: design technologies
Readings in hardware/software co-design
Efficient code generation for in-house DSP-cores
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Describing instruction set processors using nML
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Memory allocation and mapping in high-level synthesis: an integrated approach
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low power
Platform-based resource binding using a distributed register-file microarchitecture
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
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