Register allocation & spilling via graph coloring

  • Authors:

  • G. J. Chaitin

  • Affiliations:

  • IBM Research, P.O.Box 218, Yorktown Heights, NY

  • Venue:
  • SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
  • Year:
  • 1982

  • The 801 minicomputer

    ASPLOS I Proceedings of the first international symposium on Architectural support for programming languages and operating systems

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Abstract

In a previous paper we reported the successful use of graph coloring techniques for doing global register allocation in an experimental PL/I optimizing compiler. When the compiler cannot color the register conflict graph with a number of colors equal to the number of available machine registers, it must add code to spill and reload registers to and from storage. Previously the compiler produced spill code whose quality sometimes left much to be desired, and the ad hoe techniques used took considerable amounts of compile time. We have now discovered how to extend the graph coloring approach so that it naturally solves the spilling problem. Spill decisions are now made on the basis of the register conflict graph and cost estimates of the value of keeping the result of a computation in a register rather than in storage. This new approach produces better object code and takes much less compile time.