Bulldog: a compiler for VLSI architectures
Bulldog: a compiler for VLSI architectures
Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
Advanced compiler optimizations for supercomputers
Communications of the ACM - Special issue on parallelism
Interprocedural dependence analysis and parallelization
SIGPLAN '86 Proceedings of the 1986 SIGPLAN symposium on Compiler construction
MICRO 21 Proceedings of the 21st annual workshop on Microprogramming and microarchitecture
Local Microcode Compaction Techniques
ACM Computing Surveys (CSUR)
Dependence Analysis for Supercomputing
Dependence Analysis for Supercomputing
Flow Analysis of Computer Programs
Flow Analysis of Computer Programs
Fundamentals of Computer Alori
Fundamentals of Computer Alori
Horizon: A Retargetable Compiler for Horizontal Microarchitectures
IEEE Transactions on Software Engineering
Register allocation & spilling via graph coloring
SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
A model of clocked micro-architectures for firmware engineering and design automation applications
MICRO 17 Proceedings of the 17th annual workshop on Microprogramming
Local code generation and compaction in optimizing microcode compilers
Local code generation and compaction in optimizing microcode compilers
Parallelism, memory anti-aliasing and correctness for trace scheduling compilers (disambiguation, flow-analysis, compaction)
A critical analysis of the global optimization problem for horizontal microcode (phase-coupled, compaction, code motion, compilation)
Genetic algorithms and instruction scheduling
MICRO 24 Proceedings of the 24th annual international symposium on Microarchitecture
Heuristic tradeoffs between latency and energy consumption in register assignment
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Computation in the Context of Transport Triggered Architectures
International Journal of Parallel Programming
Resource Spackling: A Framework for Integrating Register Allocation in Local and Global Schedulers
PACT '94 Proceedings of the IFIP WG10.3 Working Conference on Parallel Architectures and Compilation Techniques
URSA: A Unified ReSource Allocator for Registers and Functional Units in VLIW Architectures
PACT '93 Proceedings of the IFIP WG10.3. Working Conference on Architectures and Compilation Techniques for Fine and Medium Grain Parallelism
Combined code motion and register allocation using the value state dependence graph
CC'03 Proceedings of the 12th international conference on Compiler construction
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We discuss graph-coloring register assignment in a retargetable compiler for Long-Instruction-Word architectures. Of specific concern is when, during the compilation process, should register assignment be performed. We conclude that, for best results, register assignment should follow compaction. We discuss methods of circumventing the implementation problems inherent in such late register assignment.