Coordinated computing: tools and techniques for distributed software
Coordinated computing: tools and techniques for distributed software
The design and description of computer architectures
The design and description of computer architectures
Local Microcode Compaction Techniques
ACM Computing Surveys (CSUR)
Some Aspects of High-Level Microprogramming
ACM Computing Surveys (CSUR)
Design of a Machine-Independent Optimizing System for Emulator Development
ACM Transactions on Programming Languages and Systems (TOPLAS)
An experiment in high level language microprogramming and verification
Communications of the ACM
Modular Program Construction Using Abstractions
Proceedings of the Abstract Software Specifications, 1979 Copenhagen Winter School
Architecture of the PSC-a programmable systolic chip
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
Very Long Instruction Word architectures and the ELI-512
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
RISC I: A Reduced Instruction Set VLSI Computer
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
MIDL - a microinstruction description language
MICRO 14 Proceedings of the 14th annual workshop on Microprogramming
Formal semantics for the automated derivation of micro-code
DAC '82 Proceedings of the 19th Design Automation Conference
Local code generation and compaction in optimizing microcode compilers
Local code generation and compaction in optimizing microcode compilers
Verification of microprogrammed computer architectures in the S*-system: a case study
MICRO 18 Proceedings of the 18th annual workshop on Microprogramming
A microarchitecture description language for retargeting firmware tools
MICRO 19 Proceedings of the 19th annual workshop on Microprogramming
Reducing execution parameter through correspondence in computer architecture
IBM Journal of Research and Development
Trace scheduling optimization in a retargetable microcode compiler
ACM SIGMICRO Newsletter
A functional model of clocked microarchitectures
MICRO 22 Proceedings of the 22nd annual workshop on Microprogramming and microarchitecture
Post-compaction register assignment in a retargetable compiler
MICRO 23 Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture
Trace scheduling optimization in a retargetable microcode compiler
MICRO 20 Proceedings of the 20th annual workshop on Microprogramming
IEEE Transactions on Software Engineering
Horizon: A Retargetable Compiler for Horizontal Microarchitectures
IEEE Transactions on Software Engineering
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An aspect common to many problems in firmware engineering is the use of a micromachine model that is, an abstract and selective view of the structure and behavior of the computer at the micro-architectural level. The success, utility and generality of a particular microprogramming language, compaction technique, or verification strategy may rest critically on the expressive power and generality of the underlying micromachine model. While a number of such models have been proposed in the past we believe that these are all, for one reason or another, in adequate. In this paper we present a new, generalized, multipurpose model of clocked micro-architectures intended to provide a uniform framework for use in both firmware engineering and design automation applications.