The design and description of computer architectures
The design and description of computer architectures
Design and specification of microprogrammed computer architectures
MICRO 18 Proceedings of the 18th annual workshop on Microprogramming
Some Aspects of High-Level Microprogramming
ACM Computing Surveys (CSUR)
An experiment in high level language microprogramming and verification
Communications of the ACM
A retargetable microcode generation system for a high-level microprogramming language
MICRO 14 Proceedings of the 14th annual workshop on Microprogramming
Towards a microprogramming language schema
MICRO 11 Proceedings of the 11th annual workshop on Microprogramming
Automated proofs of microprogram correctness
MICRO 9 Proceedings of the 9th annual workshop on Microprogramming
Microcode verification using SDVS-the method and a case study
MICRO 17 Proceedings of the 17th annual workshop on Microprogramming
SDVS: A system for verifying microcode correctness
MICRO 17 Proceedings of the 17th annual workshop on Microprogramming
A retargetable compiler for a high-level microprogramming language
MICRO 17 Proceedings of the 17th annual workshop on Microprogramming
A model of clocked micro-architectures for firmware engineering and design automation applications
MICRO 17 Proceedings of the 17th annual workshop on Microprogramming
An axiomatization of low-level parallelism in microarchitectures
MICRO 17 Proceedings of the 17th annual workshop on Microprogramming
Symbolic simulation for correct machine design
DAC '79 Proceedings of the 16th Design Automation Conference
IEEE Transactions on Software Engineering
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We apply the verification methodology underlying the S*-System[12], [13] to the verification of a hierarchically structured design [16] of an emulation of the instruction-set of a commercially available computer on a commercially available micro-architecture. Based on this case-study, we discuss some aspects of the relation between verification and generation of microcode.