Empirical evaluation of some features of instruction set processor architectures
Communications of the ACM
An approach to optimization of horizontal microprograms
MICRO 7 Conference record of the 7th annual workshop on Microprogramming
On storage optimization of horizontal microprograms
MICRO 7 Conference record of the 7th annual workshop on Microprogramming
A Control Word Model for detecting conflicts between microprograms
MICRO 8 Proceedings of the 8th annual workshop on Microprogramming
Execution time (and memory) optimization in microprograms
MICRO 7 Supplement to the conference record of the 7th annual workshop on Microprogramming
A machine independent approach to the production of optimized horizontal microcode.
A machine independent approach to the production of optimized horizontal microcode.
A survey on bit dimension optimization strategies of microprograms
MICRO 23 Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture
Microcode compaction via microblock definition
MICRO 15 Proceedings of the 15th annual workshop on Microprogramming
A survey of resource allocation methods in optimizing microcode compilers
MICRO 17 Proceedings of the 17th annual workshop on Microprogramming
A model of clocked micro-architectures for firmware engineering and design automation applications
MICRO 17 Proceedings of the 17th annual workshop on Microprogramming
A Hierarchical Description Model for Microcode
IEEE Transactions on Computers
IEEE Transactions on Computers
The design of a firmware engineering tool: the microcode compiler
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
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Methods are described to translate a certain machine-independent intermediate language (IML) to efficient microprograms for a class of horizontal microprogrammable machines. The IML is compiled directly from a high-level microprogramming language used to implement a virtual instruction set processor as a microprogram.The primary objective of the IML-to-host machine interface design is to facilitate language portability. Transportability is accomplished by use of a field description model and a macro expansion table which describe the host machine to the translator system.Register allocation scheme and control flow analysis are employed to allocate the symbolic variables of the IML to the general-purpose registers of the host machine. A set of 5-tuple microoperations (function, input, output, field, phase) is obtained with the aid of the field description model. Then a compaction algorithm is used to detect the parallelism of microoperations and to generate suboptimal code for a horizontal microprogrammable machine. The study concludes with a description of the effects of the above methods upon the quality of microcode produced for a specific commercial computer.