Register allocation via usage counts
Communications of the ACM
Machine-independent PASCAL code optimization
SIGPLAN '79 Proceedings of the 1979 SIGPLAN symposium on Compiler construction
Machine-independent register allocation
SIGPLAN '79 Proceedings of the 1979 SIGPLAN symposium on Compiler construction
Register allocation & spilling via graph coloring
SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
Register allocation in optimizing compilers
Register allocation in optimizing compilers
A portable machine-independent global optimizer--design and measurements
A portable machine-independent global optimizer--design and measurements
Register allocation in the SPUR Lisp compiler
SIGPLAN '86 Proceedings of the 1986 SIGPLAN symposium on Compiler construction
On the use of registers vs. cache to minimize memory traffic
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Measurement and evaluation of the MIPS architecture and processor
ACM Transactions on Computer Systems (TOCS)
IEEE Transactions on Software Engineering
Minimizing register usage penalty at procedure calls
PLDI '88 Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation
A Simplified Framework for Reduction in Strength
IEEE Transactions on Software Engineering
A simple interprocedural register allocation algorithm and its effectiveness for LISP
ACM Transactions on Programming Languages and Systems (TOPLAS)
Code Optimization Across Procedures
Computer
Using registers to optimize cross-domain call performance
ASPLOS III Proceedings of the third international conference on Architectural support for programming languages and operating systems
Global value numbers and redundant computations
POPL '88 Proceedings of the 15th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Inline function expansion for compiling C programs
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
Spill code minimization techniques for optimizing compliers
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
Register allocation via clique separators
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
Coloring heuristics for register allocation
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
Unified management of registers and cache using liveness and cache bypass
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
Achieving high instruction cache performance with an optimizing compiler
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
On the Minimization of Loads/Stores in Local Register Allocation
IEEE Transactions on Software Engineering
The priority-based coloring approach to register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Register allocation across procedure and module boundaries
PLDI '90 Proceedings of the ACM SIGPLAN 1990 conference on Programming language design and implementation
Graph coloring register allocation for processors with multi-register operands
PLDI '90 Proceedings of the ACM SIGPLAN 1990 conference on Programming language design and implementation
Architectural support for reduced register saving/restoring in single-window register files
ACM Transactions on Computer Systems (TOCS)
Integrating register allocation and instruction scheduling for RISCs
ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems
Mapping concurrent programs to VLIW processors
PPOPP '91 Proceedings of the third ACM SIGPLAN symposium on Principles and practice of parallel programming
CCG: a prototype coagulating code generator
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
Register allocation via hierarchical graph coloring
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
The Marion system for retargetable instruction scheduling
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
IMPACT: an architectural framework for multiple-instruction-issue processors
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Flexible register management for sequential programs
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Subprogram Inlining: A Study of its Effects on Program Execution Time
IEEE Transactions on Software Engineering
ACM Letters on Programming Languages and Systems (LOPLAS)
Unboxed objects and polymorphic typing
POPL '92 Proceedings of the 19th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Processor Architecture and Data Buffering
IEEE Transactions on Computers
IEEE Transactions on Computers
A practical data flow framework for array reference analysis and its use in optimizations
PLDI '93 Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation
A schedular-sensitive global register allocator
Proceedings of the 1993 ACM/IEEE conference on Supercomputing
Efficient register allocation via coloring using clique separators
ACM Transactions on Programming Languages and Systems (TOPLAS)
Improvements to graph coloring register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Register allocation over the program dependence graph
PLDI '94 Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation
Improving the ratio of memory operations to floating-point operations in loops
ACM Transactions on Programming Languages and Systems (TOPLAS)
Compiler-Based Multiple Instruction Retry
IEEE Transactions on Computers
Interprocedural register allocation for lazy functional languages
FPCA '95 Proceedings of the seventh international conference on Functional programming languages and computer architecture
A register allocation technique using guarded PDG
ICS '96 Proceedings of the 10th international conference on Supercomputing
Predictability of load/store instruction latencies
MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
tcc: a system for fast, flexible, and high-level dynamic code generation
Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation
IMPACT: an architectural framework for multiple-instruction-issue processors
25 years of the international symposia on Computer architecture (selected papers)
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Control flow optimization for supercomputer scalar processing
ICS '89 Proceedings of the 3rd international conference on Supercomputing
Reducing the impact of software prefetching on register pressure
SAC '00 Proceedings of the 2000 ACM symposium on Applied computing - Volume 2
Profile assisted register allocation
SAC '00 Proceedings of the 2000 ACM symposium on Applied computing - Volume 2
Modular interprocedural pointer analysis using access paths: design, implementation, and evaluation
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
Some comments on “the priority-based coloring approach to register allocation”
ACM SIGPLAN Notices
Evaluating the use of profiling by a region-based register allocator
Proceedings of the 2002 ACM symposium on Applied computing
A Comparison of RISC Architectures
IEEE Micro
The Effect of Code Expanding Optimizations on Instruction Cache Design
IEEE Transactions on Computers
Compile-Time Techniques for Improving Scalar Access Performance in Parallel Memories
IEEE Transactions on Parallel and Distributed Systems
An Accurate Worst Case Timing Analysis for RISC Processors
IEEE Transactions on Software Engineering
Analyzing Boltzmann Machine Parameters for Fast Convergence
IWANN '01 Proceedings of the 6th International Work-Conference on Artificial and Natural Neural Networks: Bio-inspired Applications of Connectionism-Part II
Compiler Optimizations for Adaptive EPIC Processors
EMSOFT '01 Proceedings of the First International Workshop on Embedded Software
Advanced Compiler Optimization for Calm RISC8 Low-End Embedded Processor
CC '00 Proceedings of the 9th International Conference on Compiler Construction
Static array storage optimization in MATLAB
PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation
Inter-procedural stacked register allocation for itanium® like architecture
ICS '03 Proceedings of the 17th annual international conference on Supercomputing
Signal Processing - From signal processing theory to implementation
Coloring heuristics for register allocation
ACM SIGPLAN Notices - Best of PLDI 1979-1999
Improving register allocation for subscripted variables
ACM SIGPLAN Notices - Best of PLDI 1979-1999
Using de-optimization to re-optimize code
Proceedings of the 5th ACM international conference on Embedded software
Optimal register reassignment for register stack overflow minimization
ACM Transactions on Architecture and Code Optimization (TACO)
A global progressive register allocator
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
Profile-based global live-range splitting
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
UCC: update-conscious compilation for energy efficiency in wireless sensor networks
Proceedings of the 2007 ACM SIGPLAN conference on Programming language design and implementation
Exploiting hierarchy and structure to efficiently solve graph coloring as SAT
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Exploiting virtual registers to reduce pressure on real registers
ACM Transactions on Architecture and Code Optimization (TACO)
Fast, frequency-based, integrated register allocation and instruction scheduling
Software—Practice & Experience
Towards update-conscious compilation for energy-efficient code dissemination in WSNs
ACM Transactions on Architecture and Code Optimization (TACO)
Approximations for Aligned Coloring and Spillage Minimization in Interval and Chordal Graphs
APPROX '09 / RANDOM '09 Proceedings of the 12th International Workshop and 13th International Workshop on Approximation, Randomization, and Combinatorial Optimization. Algorithms and Techniques
Extended linear scan: an alternate foundation for global register allocation
CC'07 Proceedings of the 16th international conference on Compiler construction
Virtual registers: reducing register pressure without enlarging the register file
HiPEAC'07 Proceedings of the 2nd international conference on High performance embedded architectures and compilers
LIRAC: using live range information to optimize memory access
ARCS'07 Proceedings of the 20th international conference on Architecture of computing systems
Register allocation by optimal graph coloring
CC'03 Proceedings of the 12th international conference on Compiler construction
Scheduling expression DAGs for minimal register need
Computer Languages
Discrete Applied Mathematics
Constraint-Based register allocation and instruction scheduling
CP'12 Proceedings of the 18th international conference on Principles and Practice of Constraint Programming
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The classic problem of global register allocation is treated in a heuristic and practical manner by adopting the notion of priorities in node-coloring. The assignment of priorities is based on estimates of the benefits that can be derived from allocating individual quantities in registers. Using the priorities, the exponential coloring process can be made to run in linear time. Since the costs involved in register allocation are taken into account, the algorithm does not over-allocate. The algorithm can be parameterized to cater to different fetch characteristics and register configurations among machines. Measurements indicate that the register allocation scheme is effective on a number of target machines. The results confirm that, using priority-based coloring, global register allocation can be performed practically and efficiently.