Effectiveness of a machine-level, global optimizer
SIGPLAN '86 Proceedings of the 1986 SIGPLAN symposium on Compiler construction
Register allocation in the SPUR Lisp compiler
SIGPLAN '86 Proceedings of the 1986 SIGPLAN symposium on Compiler construction
Spill code minimization techniques for optimizing compliers
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
Register allocation via clique separators
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
The priority-based coloring approach to register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Graph coloring register allocation for processors with multi-register operands
PLDI '90 Proceedings of the ACM SIGPLAN 1990 conference on Programming language design and implementation
Automatic construction of sparse data flow evaluation graphs
POPL '91 Proceedings of the 18th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Constant propagation with conditional branches
ACM Transactions on Programming Languages and Systems (TOPLAS)
Register allocation via hierarchical graph coloring
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
Efficiently computing static single assignment form and the control dependence graph
ACM Transactions on Programming Languages and Systems (TOPLAS)
A retargetable compiler for ANSI C
ACM SIGPLAN Notices
ACM Letters on Programming Languages and Systems (LOPLAS)
Simple register spilling in a retargetable compiler
Software—Practice & Experience
Probabilistic register allocation
PLDI '92 Proceedings of the ACM SIGPLAN 1992 conference on Programming language design and implementation
Register allocation via graph coloring
Register allocation via graph coloring
ALPHA—An Automatic Programming System of High Efficiency
Journal of the ACM (JACM)
Smallest-last ordering and clustering and graph coloring algorithms
Journal of the ACM (JACM)
Register allocation by priority-based coloring
SIGPLAN '84 Proceedings of the 1984 SIGPLAN symposium on Compiler construction
Engineering a Compiler: VAX-11 Code Generation and Optimization
Engineering a Compiler: VAX-11 Code Generation and Optimization
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computer Methods for Mathematical Computations
Computer Methods for Mathematical Computations
Automatic storage optimization
SIGPLAN '79 Proceedings of the 1979 SIGPLAN symposium on Compiler construction
Register allocation & spilling via graph coloring
SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
Global flow analysis and register allocation for simple code structures
Global flow analysis and register allocation for simple code structures
Software pipelining with register allocation and spilling
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
ACM Transactions on Programming Languages and Systems (TOPLAS)
POPL '96 Proceedings of the 23rd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Heuristics for register-constrained software pipelining
Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
Register promotion in C programs
Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation
Analysis and evaluation of address arithmetic capabilities in custom DSP architectures
DAC '97 Proceedings of the 34th annual Design Automation Conference
The multicluster architecture: reducing cycle time through partitioning
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Quality and speed in linear-scan register allocation
PLDI '98 Proceedings of the ACM SIGPLAN 1998 conference on Programming language design and implementation
Development of an optimizing compiler for a Fujitsu fixed-point digital signal processor
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Optimizing for reduced code space using genetic algorithms
Proceedings of the ACM SIGPLAN 1999 workshop on Languages, compilers, and tools for embedded systems
Proceedings of the ninth annual ACM-SIAM symposium on Discrete algorithms
The Multicluster Architecture: Reducing Processor Cycle Time Through Partitioning
International Journal of Parallel Programming
Linear scan register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Look-ahead allocation in the presence of branches
SAC '97 Proceedings of the 1997 ACM symposium on Applied computing
Unroll-based register coalescing
Proceedings of the 14th international conference on Supercomputing
Profile assisted register allocation
SAC '00 Proceedings of the 2000 ACM symposium on Applied computing - Volume 2
Improved spill code generation for software pipelined loops
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
A high performance Erlang system
Proceedings of the 2nd ACM SIGPLAN international conference on Principles and practice of declarative programming
Retargetable compilation for low power
Proceedings of the ninth international symposium on Hardware/software codesign
Optimal spilling for CISC machines with few registers
Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation
Register Allocation for Banked Register File
OM '01 Proceedings of the 2001 ACM SIGPLAN workshop on Optimization of middleware and distributed systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
Evaluating the use of profiling by a region-based register allocator
Proceedings of the 2002 ACM symposium on Applied computing
Preference-directed graph coloring
PLDI '02 Proceedings of the ACM SIGPLAN 2002 Conference on Programming language design and implementation
Register allocation for irregular architectures
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Readings in hardware/software co-design
Bytecode verification on Java smart cards
Software—Practice & Experience
Bitwidth aware global register allocation
POPL '03 Proceedings of the 30th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
The Intel IA-64 Compiler Code Generator
IEEE Micro
Unroll-Based Copy Elimination for Enhanced Pipeline Scheduling
IEEE Transactions on Computers
IEEE Transactions on Computers
Minimum Register Instruction Sequence Problem: Revisiting Optimal Code Generation for DAGs
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
Copy Elimination for Parallelizing Compilers
LCPC '98 Proceedings of the 11th International Workshop on Languages and Compilers for Parallel Computing
A Spill Code Placement Framework for Code Scheduling
LCPC '98 Proceedings of the 11th International Workshop on Languages and Compilers for Parallel Computing
Unroll-Based Copy Elimination for Enhanced Pipeline Scheduling
LCPC '99 Proceedings of the 12th International Workshop on Languages and Compilers for Parallel Computing
Linear Scan Register Allocation in a High-Performance Erlang Compiler
PADL '02 Proceedings of the 4th International Symposium on Practical Aspects of Declarative Languages
On-Card Bytecode Verification for Java Card
E-SMART '01 Proceedings of the International Conference on Research in Smart Cards: Smart Card Programming and Security
A Framework for Enhancing Code Quality in Limited Register Set Embedded Processors
LCTES '00 Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems
Scalable Certification for Typed Assembly Language
TIC '00 Selected papers from the Third International Workshop on Types in Compilation
Linear Scan Register Allocation in the Context of SSA Form and Register Constraints
CC '02 Proceedings of the 11th International Conference on Compiler Construction
Cross-Architectural Performance Portability of a Java Virtual Machine Implementation
Proceedings of the 2nd Java Virtual Machine Research and Technology Symposium
A Framework for Efficient Register Allocation through Selective Register Demotion
LCR '00 Selected Papers from the 5th International Workshop on Languages, Compilers, and Run-Time Systems for Scalable Computers
A faster optimal register allocator
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Inter-procedural stacked register allocation for itanium® like architecture
ICS '03 Proceedings of the 17th annual international conference on Supercomputing
MicroUnity Software Development Environment
COMPCON '96 Proceedings of the 41st IEEE International Computer Conference
Signal Processing - From signal processing theory to implementation
Register Constrained Modulo Scheduling
IEEE Transactions on Parallel and Distributed Systems
Register allocation by proof transformation
Science of Computer Programming - Special issue on 12th European symposium on programming (ESOP 2003)
A generalized algorithm for graph-coloring register allocation
Proceedings of the ACM SIGPLAN 2004 conference on Programming language design and implementation
Optimistic register coalescing
ACM Transactions on Programming Languages and Systems (TOPLAS)
Binary translation to improve energy efficiency through post-pass register re-allocation
Proceedings of the 4th ACM international conference on Embedded software
ERLANG '04 Proceedings of the 2004 ACM SIGPLAN workshop on Erlang
A fast, memory-efficient register allocation framework for embedded systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
Building Intrusion-Tolerant Secure Software
Proceedings of the international symposium on Code generation and optimization
A Progressive Register Allocator for Irregular Architectures
Proceedings of the international symposium on Code generation and optimization
Optimized interval splitting in a linear scan register allocator
Proceedings of the 1st ACM/USENIX international conference on Virtual execution environments
Comparing conservative coalescing criteria
ACM Transactions on Programming Languages and Systems (TOPLAS)
Efficiently compiling a functional language on AMD64: the HiPE experience
PPDP '05 Proceedings of the 7th ACM SIGPLAN international conference on Principles and practice of declarative programming
Encyclopedia of Computer Science
Evolution of a java just-in-time compiler for IA-32 platforms
IBM Journal of Research and Development
Memory Coloring: A Compiler Approach for Scratchpad Memory Management
Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques
Tailoring Graph-coloring Register Allocation For Runtime Compilation
Proceedings of the International Symposium on Code Generation and Optimization
Post Register Allocation Spill Code Optimization
Proceedings of the International Symposium on Code Generation and Optimization
Compiler Optimizations to Reduce Security Overhead
Proceedings of the International Symposium on Code Generation and Optimization
Optimal register reassignment for register stack overflow minimization
ACM Transactions on Architecture and Code Optimization (TACO)
A global progressive register allocator
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
Average case vs. worst case: margins of safety in system design
NSPW '05 Proceedings of the 2005 workshop on New security paradigms
Prematerialization: reducing register pressure for free
Proceedings of the 15th international conference on Parallel architectures and compilation techniques
Parallelizing load/stores on dual-bank memory embedded processors
ACM Transactions on Embedded Computing Systems (TECS)
SSA-based mobile code: Implementation and empirical evaluation
ACM Transactions on Architecture and Code Optimization (TACO)
UCC: update-conscious compilation for energy efficiency in wireless sensor networks
Proceedings of the 2007 ACM SIGPLAN conference on Programming language design and implementation
On the Complexity of Register Coalescing
Proceedings of the International Symposium on Code Generation and Optimization
The java hotspotTM server compiler
JVM'01 Proceedings of the 2001 Symposium on JavaTM Virtual Machine Research and Technology Symposium - Volume 1
An optimistic and conservative register assignment heuristic for chordal graphs
CASES '07 Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Virtual machine showdown: Stack versus registers
ACM Transactions on Architecture and Code Optimization (TACO)
Design of the Java HotSpot™ client compiler for Java 6
ACM Transactions on Architecture and Code Optimization (TACO)
Exploiting idle register classes for fast spill destination
Proceedings of the 22nd annual international conference on Supercomputing
Copy coalescing by graph recoloring
Proceedings of the 2008 ACM SIGPLAN conference on Programming language design and implementation
Placement-and-routing-based register allocation for coarse-grained reconfigurable arrays
Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems
Optimizing scientific application loops on stream processors
Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems
Fast, frequency-based, integrated register allocation and instruction scheduling
Software—Practice & Experience
EMSOFT '08 Proceedings of the 8th ACM international conference on Embedded software
Advanced conservative and optimistic register coalescing
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
Register Bank Assignment for Spatially Partitioned Processors
Languages and Compilers for Parallel Computing
Proceedings of the 14th ACM SIGPLAN symposium on Principles and practice of parallel programming
Compiler-managed register file protection for energy-efficient soft error reduction
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Combinatorial optimization in system configuration design
Automation and Remote Control
Register Spilling and Live-Range Splitting for SSA-Form Programs
CC '09 Proceedings of the 18th International Conference on Compiler Construction: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009
Fast Code Generation for Embedded Processors with Aliased Heterogeneous Registers
Transactions on High-Performance Embedded Architectures and Compilers II
Register allocation deconstructed
Proceedings of th 12th International Workshop on Software and Compilers for Embedded Systems
Revisiting Out-of-SSA Translation for Correctness, Code Quality and Efficiency
Proceedings of the 7th annual IEEE/ACM International Symposium on Code Generation and Optimization
Techniques for Region-Based Register Allocation
Proceedings of the 7th annual IEEE/ACM International Symposium on Code Generation and Optimization
Transactions on Computational Science V
Compiler-directed scratchpad memory management via graph coloring
ACM Transactions on Architecture and Code Optimization (TACO)
Towards update-conscious compilation for energy-efficient code dissemination in WSNs
ACM Transactions on Architecture and Code Optimization (TACO)
SRF coloring: stream register file allocation via graph coloring
Journal of Computer Science and Technology
Approximations for Aligned Coloring and Spillage Minimization in Interval and Chordal Graphs
APPROX '09 / RANDOM '09 Proceedings of the 12th International Workshop and 13th International Workshop on Approximation, Randomization, and Combinatorial Optimization. Algorithms and Techniques
Progressive spill code placement
CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
Detecting bugs in register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
On minimizing register usage of linearly scheduled algorithms with uniform dependencies
Computer Languages, Systems and Structures
Optimal bitwise register allocation using integer linear programming
LCPC'06 Proceedings of the 19th international conference on Languages and compilers for parallel computing
LCPC'06 Proceedings of the 19th international conference on Languages and compilers for parallel computing
A fast cutting-plane algorithm for optimal coalescing
CC'07 Proceedings of the 16th international conference on Compiler construction
Register allocation by proof transformation
ESOP'03 Proceedings of the 12th European conference on Programming
Register allocation by optimal graph coloring
CC'03 Proceedings of the 12th international conference on Compiler construction
MIRS: modulo scheduling with integrated register spilling
LCPC'01 Proceedings of the 14th international conference on Languages and compilers for parallel computing
Coloring-based coalescing for graph coloring register allocation
Proceedings of the 8th annual IEEE/ACM international symposium on Code generation and optimization
Linear scan register allocation on SSA form
Proceedings of the 8th annual IEEE/ACM international symposium on Code generation and optimization
Compilation strategies for reducing code size on a VLIW processor with variable length instructions
HiPEAC'08 Proceedings of the 3rd international conference on High performance embedded architectures and compilers
A compiler-microarchitecture hybrid approach to soft error reduction for register files
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Overlay techniques for scratchpad memories in low power embedded processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
SSA-based register allocation with PBQP
CC'11/ETAPS'11 Proceedings of the 20th international conference on Compiler construction: part of the joint European conferences on theory and practice of software
Decoupled graph-coloring register allocation with hierarchical aliasing
Proceedings of the 14th International Workshop on Software and Compilers for Embedded Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An efficient hierarchical parallel genetic algorithm for graph coloring problem
Proceedings of the 13th annual conference on Genetic and evolutionary computation
Graph-coloring and treescan register allocation using repairing
CASES '11 Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
LCPC'05 Proceedings of the 18th international conference on Languages and Compilers for Parallel Computing
Efficient liveness computation using merge sets and DJ-graphs
ACM Transactions on Architecture and Code Optimization (TACO) - HIPEAC Papers
Catching and identifying bugs in register allocation
SAS'06 Proceedings of the 13th international conference on Static Analysis
HiPC'05 Proceedings of the 12th international conference on High Performance Computing
Register allocation via coloring of chordal graphs
APLAS'05 Proceedings of the Third Asian conference on Programming Languages and Systems
Single and multiple device DSA problems, complexities and online algorithms
Theoretical Computer Science
Nearly optimal register allocation with PBQP
JMLC'06 Proceedings of the 7th joint conference on Modular Programming Languages
ACM Transactions on Architecture and Code Optimization (TACO)
Parallelism improvements of software pipelining by combining spilling with rematerialization
KES'05 Proceedings of the 9th international conference on Knowledge-Based Intelligent Information and Engineering Systems - Volume Part I
Combining offline and online optimizations: register allocation and method inlining
APLAS'06 Proceedings of the 4th Asian conference on Programming Languages and Systems
Split register allocation: linear complexity without the performance penalty
HiPEAC'10 Proceedings of the 5th international conference on High Performance Embedded Architectures and Compilers
CC'10/ETAPS'10 Proceedings of the 19th joint European conference on Theory and Practice of Software, international conference on Compiler Construction
Strategies for predicate-aware register allocation
CC'10/ETAPS'10 Proceedings of the 19th joint European conference on Theory and Practice of Software, international conference on Compiler Construction
Preference-Guided register assignment
CC'10/ETAPS'10 Proceedings of the 19th joint European conference on Theory and Practice of Software, international conference on Compiler Construction
Formal verification of coalescing graph-coloring register allocation
ESOP'10 Proceedings of the 19th European conference on Programming Languages and Systems
Hybrid optimizations: which optimization algorithm to use?
CC'06 Proceedings of the 15th international conference on Compiler Construction
SARA: combining stack allocation and register allocation
CC'06 Proceedings of the 15th international conference on Compiler Construction
Register allocation for programs in SSA-Form
CC'06 Proceedings of the 15th international conference on Compiler Construction
Enhanced bitwidth-aware register allocation
CC'06 Proceedings of the 15th international conference on Compiler Construction
ErLLVM: an LLVM backend for Erlang
Proceedings of the eleventh ACM SIGPLAN workshop on Erlang workshop
Elimination of parallel copies using code motion on data dependence graphs
Computer Languages, Systems and Structures
Throughput-oriented kernel porting onto FPGAs
Proceedings of the 50th Annual Design Automation Conference
Average-case complexity of backtrack search for coloring sparse random graphs
Journal of Computer and System Sciences
Improved bitwidth-aware variable packing
ACM Transactions on Architecture and Code Optimization (TACO)
A decoupled non-SSA global register allocation using bipartite liveness graphs
ACM Transactions on Architecture and Code Optimization (TACO)
Hardware acceleration for programs in SSA form
Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
A hierarchical parallel genetic approach for the graph coloring problem
Applied Intelligence
| Hi-index | 0.01 |
We describe two improvements to Chaitin-style graph coloring register allocators. The first, optimistic coloring, uses a stronger heuristic to find a k-coloring for the interference graph. The second extends Chaitin's treatment of rematerialization to handle a larger class of values. These techniques are complementary. Optimistic coloring decreases the number of procedures that require spill code and reduces the amount of spill code when spilling is unavoidable. Rematerialization lowers the cost of spilling some values. This paper describes both of the techniques and our experience building and using register allocators that incorporate them. It provides a detailed description of optimistic coloring and rematerialization. It presents experimental data to show the performance of several versions of the register allocator on a suite of FORTRAN programs. It discusses several insights that we discovered only after repeated implementation of these allocators.