Efficiently computing static single assignment form and the control dependence graph
ACM Transactions on Programming Languages and Systems (TOPLAS)
Improvements to graph coloring register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
ACM Transactions on Programming Languages and Systems (TOPLAS)
Practical improvements to the construction and destruction of static single assignment form
Software—Practice & Experience
Static single assignment form for machine code
Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation
Fusion-based register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Journal of Algorithms
Optimal spilling for CISC machines with few registers
Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation
Fast copy coalescing and live-range identification
PLDI '02 Proceedings of the ACM SIGPLAN 2002 Conference on Programming language design and implementation
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Live Range Splitting in a Graph Coloring Register Allocator
CC '98 Proceedings of the 7th International Conference on Compiler Construction
Evaluation of Algorithms for Local Register Allocation
CC '99 Proceedings of the 8th International Conference on Compiler Construction, Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS'99
Optimistic Register Coalescing
PACT '98 Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques
Register Allocation Using Control Trees
Register Allocation Using Control Trees
Optimizing Translation Out of SSA Using Renaming Constraints
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
Algorithmic Graph Theory and Perfect Graphs (Annals of Discrete Mathematics, Vol 57)
Algorithmic Graph Theory and Perfect Graphs (Annals of Discrete Mathematics, Vol 57)
Register allocation via coloring of chordal graphs
CATS '07 Proceedings of the thirteenth Australasian symposium on Theory of computing - Volume 65
Register allocation after classical SSA elimination is NP-Complete
FOSSACS'06 Proceedings of the 9th European joint conference on Foundations of Software Science and Computation Structures
Register allocation for programs in SSA-Form
CC'06 Proceedings of the 15th international conference on Compiler Construction
On the complexity of spill everywhere under SSA form
Proceedings of the 2007 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
An optimistic and conservative register assignment heuristic for chordal graphs
CASES '07 Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems
Fast liveness checking for ssa-form programs
Proceedings of the 6th annual IEEE/ACM international symposium on Code generation and optimization
Register allocation by puzzle solving
Proceedings of the 2008 ACM SIGPLAN conference on Programming language design and implementation
Copy coalescing by graph recoloring
Proceedings of the 2008 ACM SIGPLAN conference on Programming language design and implementation
SSA Elimination after Register Allocation
CC '09 Proceedings of the 18th International Conference on Compiler Construction: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009
Register Spilling and Live-Range Splitting for SSA-Form Programs
CC '09 Proceedings of the 18th International Conference on Compiler Construction: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009
Proceedings of the 13th International Workshop on Software & Compilers for Embedded Systems
Optimizing local memory allocation and assignment through a decoupled approach
LCPC'09 Proceedings of the 22nd international conference on Languages and Compilers for Parallel Computing
Split register allocation: linear complexity without the performance penalty
HiPEAC'10 Proceedings of the 5th international conference on High Performance Embedded Architectures and Compilers
Preference-Guided register assignment
CC'10/ETAPS'10 Proceedings of the 19th joint European conference on Theory and Practice of Software, international conference on Compiler Construction
ACM Transactions on Embedded Computing Systems (TECS)
A non-iterative data-flow algorithm for computing liveness sets in strict SSA programs
APLAS'11 Proceedings of the 9th Asian conference on Programming Languages and Systems
A decoupled local memory allocator
ACM Transactions on Architecture and Code Optimization (TACO) - Special Issue on High-Performance Embedded Architectures and Compilers
Improved loop tiling based on the removal of spurious false dependences
ACM Transactions on Architecture and Code Optimization (TACO) - Special Issue on High-Performance Embedded Architectures and Compilers
ACM Transactions on Embedded Computing Systems (TECS)
Hardware acceleration for programs in SSA form
Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
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Register allocation is one of the most studied problems in compilation. It is considered NP-complete since Chaitin et al., in 1981, modeled the problem of assigning temporary variables to k machine registers as the problem of coloring, with k colors, the interference graph associated to the variables. The fact that this graph can be arbitrary proves the NP-completeness of this formulation. However, this original proof does not really show where the complexity of register allocation comes from. Recently, the re-discovery that interference graphs of SSA programs can be colored in polynomial time raised the question: Can we use SSA to do register allocation in polynomial time, without contradicting Chaitin et al's NP-completeness result? To address this question and, more generally, the complexity of register allocation, we revisit Chaitin et al's proof to identify the interactions between spilling (load/store insertion), coalescing/splitting (removal/ insertion of register moves), critical edges (property of the control flow), and coloring (assignment to registers). In particular, we show that, in general, it is easy to decide if temporary variables can be assigned to k registers or if some spilling is necessary. In other words, the real complexity does not come from the coloring itself (as a misinterpretation Chaitin et al's proof may suggest) but comes from critical edges and from the optimizations of spilling and coalescing.