Improvements to graph coloring register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Accurate static estimators for program optimization
PLDI '94 Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation
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Quality and speed in linear-scan register allocation
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Fusion-based register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Optimal spilling for CISC machines with few registers
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Fast copy coalescing and live-range identification
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Automatic storage optimization
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Optimistic register coalescing
ACM Transactions on Programming Languages and Systems (TOPLAS)
Optimized interval splitting in a linear scan register allocator
Proceedings of the 1st ACM/USENIX international conference on Virtual execution environments
Profile-based global live-range splitting
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On the Complexity of Register Coalescing
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An optimistic and conservative register assignment heuristic for chordal graphs
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Register allocation by puzzle solving
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Copy coalescing by graph recoloring
Proceedings of the 2008 ACM SIGPLAN conference on Programming language design and implementation
Advanced conservative and optimistic register coalescing
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Register Spilling and Live-Range Splitting for SSA-Form Programs
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Extended linear scan: an alternate foundation for global register allocation
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Register allocation for programs in SSA-Form
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Optimal register sharing for high-level synthesis of SSA form programs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
SSA-based register allocation with PBQP
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Graph-coloring and treescan register allocation using repairing
CASES '11 Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems
Copy elimination on data dependence graphs
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Elimination of parallel copies using code motion on data dependence graphs
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A decoupled non-SSA global register allocation using bipartite liveness graphs
ACM Transactions on Architecture and Code Optimization (TACO)
Hardware acceleration for programs in SSA form
Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
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This paper deals with coalescing in SSA-based register allocation. Current coalescing techniques all require the interference graph to be built. This is generally considered to be too compile-time intensive for just-in-time compilation. In this paper, we present a biased coloring approach that gives results similar to standalone coalescers while significantly reducing compile time.