The priority-based coloring approach to register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
PLDI '93 Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation
Register allocation via graph coloring
Register allocation via graph coloring
Improvements to graph coloring register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
ACM Transactions on Programming Languages and Systems (TOPLAS)
Quality and speed in linear-scan register allocation
PLDI '98 Proceedings of the ACM SIGPLAN 1998 conference on Programming language design and implementation
Static single assignment form for machine code
Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation
Linear scan register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Lx: a technology platform for customizable VLIW embedded processing
Proceedings of the 27th annual international symposium on Computer architecture
Optimal spilling for CISC machines with few registers
Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation
Fast copy coalescing and live-range identification
PLDI '02 Proceedings of the ACM SIGPLAN 2002 Conference on Programming language design and implementation
Linear Scan Register Allocation in the Context of SSA Form and Register Constraints
CC '02 Proceedings of the 11th International Conference on Compiler Construction
Register allocation & spilling via graph coloring
SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
Optimistic Register Coalescing
PACT '98 Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques
A generalized algorithm for graph-coloring register allocation
Proceedings of the ACM SIGPLAN 2004 conference on Programming language design and implementation
Optimistic register coalescing
ACM Transactions on Programming Languages and Systems (TOPLAS)
Optimized interval splitting in a linear scan register allocator
Proceedings of the 1st ACM/USENIX international conference on Virtual execution environments
On the Complexity of Register Coalescing
Proceedings of the International Symposium on Code Generation and Optimization
On the complexity of spill everywhere under SSA form
Proceedings of the 2007 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Fast liveness checking for ssa-form programs
Proceedings of the 6th annual IEEE/ACM international symposium on Code generation and optimization
Register allocation by puzzle solving
Proceedings of the 2008 ACM SIGPLAN conference on Programming language design and implementation
Advanced conservative and optimistic register coalescing
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
Register Spilling and Live-Range Splitting for SSA-Form Programs
CC '09 Proceedings of the 18th International Conference on Compiler Construction: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009
Revisiting Out-of-SSA Translation for Correctness, Code Quality and Efficiency
Proceedings of the 7th annual IEEE/ACM International Symposium on Code Generation and Optimization
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
Extended linear scan: an alternate foundation for global register allocation
CC'07 Proceedings of the 16th international conference on Compiler construction
Coloring-based coalescing for graph coloring register allocation
Proceedings of the 8th annual IEEE/ACM international symposium on Code generation and optimization
Linear scan register allocation on SSA form
Proceedings of the 8th annual IEEE/ACM international symposium on Code generation and optimization
Preference-Guided register assignment
CC'10/ETAPS'10 Proceedings of the 19th joint European conference on Theory and Practice of Software, international conference on Compiler Construction
Register allocation for programs in SSA-Form
CC'06 Proceedings of the 15th international conference on Compiler Construction
A decoupled non-SSA global register allocation using bipartite liveness graphs
ACM Transactions on Architecture and Code Optimization (TACO)
Hardware acceleration for programs in SSA form
Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
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Graph coloring and linear scan are two appealing techniques for register allocation as the underlying formalism are extremely clean and simple. This paper advocates a decoupled approach that first lowers the register pressure by spilling variables, and then performs live ranges splitting/coalescing/coloring in a separate phase; this enables the design of simpler, cleaner, and more efficient register allocators. This paper gives a new and more general approach to deal with register constraints. This approach called repairing does not require pre live range splitting and does not introduce additional spill code. It ignores register constraints during coloring/coalescing, and repairs violated constraints afterwards. We applied this method to both graph based and scan based allocators into a decoupled approach. Here, the Iterated Register Coalescer (IRC) and a scan algorithm that uses Static Single Assignment (SSA) properties, the treescan. Moreover, this paper provides a survey on existing and new techniques of bias coloring during scan approaches. Our experimental evaluation shows for the graph based approach, that we reduced the number of vertices (edges) in the interference graph by 26% (33%) without compromising the quality of the generated code. The treescan algorithm improved the compile time of the allocation process by 6.97x over IRC while providing comparable results for the quality of the generated code.