Efficiently computing static single assignment form and the control dependence graph
ACM Transactions on Programming Languages and Systems (TOPLAS)
Improvements to graph coloring register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Accurate static estimators for program optimization
PLDI '94 Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Building an optimizing compiler
Building an optimizing compiler
Practical improvements to the construction and destruction of static single assignment form
Software—Practice & Experience
Fusion-based register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Optimal spilling for CISC machines with few registers
Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation
Automatic storage optimization
SIGPLAN '79 Proceedings of the 1979 SIGPLAN symposium on Compiler construction
Optimistic register coalescing
ACM Transactions on Programming Languages and Systems (TOPLAS)
Profile-based global live-range splitting
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
On the Complexity of Register Coalescing
Proceedings of the International Symposium on Code Generation and Optimization
The java hotspotTM server compiler
JVM'01 Proceedings of the 2001 Symposium on JavaTM Virtual Machine Research and Technology Symposium - Volume 1
LCPC'06 Proceedings of the 19th international conference on Languages and compilers for parallel computing
A fast cutting-plane algorithm for optimal coalescing
CC'07 Proceedings of the 16th international conference on Compiler construction
Register allocation via coloring of chordal graphs
APLAS'05 Proceedings of the Third Asian conference on Programming Languages and Systems
Register allocation for programs in SSA-Form
CC'06 Proceedings of the 15th international conference on Compiler Construction
Optimal register sharing for high-level synthesis of SSA form programs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Combinatorial optimization in system configuration design
Automation and Remote Control
SSA Elimination after Register Allocation
CC '09 Proceedings of the 18th International Conference on Compiler Construction: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009
Register allocation deconstructed
Proceedings of th 12th International Workshop on Software and Compilers for Embedded Systems
On minimizing register usage of linearly scheduled algorithms with uniform dependencies
Computer Languages, Systems and Structures
Coloring-based coalescing for graph coloring register allocation
Proceedings of the 8th annual IEEE/ACM international symposium on Code generation and optimization
Linear scan register allocation on SSA form
Proceedings of the 8th annual IEEE/ACM international symposium on Code generation and optimization
Proceedings of the 13th International Workshop on Software & Compilers for Embedded Systems
SSA-based register allocation with PBQP
CC'11/ETAPS'11 Proceedings of the 20th international conference on Compiler construction: part of the joint European conferences on theory and practice of software
Decoupled graph-coloring register allocation with hierarchical aliasing
Proceedings of the 14th International Workshop on Software and Compilers for Embedded Systems
CC'10/ETAPS'10 Proceedings of the 19th joint European conference on Theory and Practice of Software, international conference on Compiler Construction
Preference-Guided register assignment
CC'10/ETAPS'10 Proceedings of the 19th joint European conference on Theory and Practice of Software, international conference on Compiler Construction
Formal verification of coalescing graph-coloring register allocation
ESOP'10 Proceedings of the 19th European conference on Programming Languages and Systems
Copy elimination on data dependence graphs
Proceedings of the 27th Annual ACM Symposium on Applied Computing
Elimination of parallel copies using code motion on data dependence graphs
Computer Languages, Systems and Structures
A decoupled non-SSA global register allocation using bipartite liveness graphs
ACM Transactions on Architecture and Code Optimization (TACO)
Hardware acceleration for programs in SSA form
Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
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Register allocation is always a trade-off between live-range splitting and coalescing. Live-range splitting generally leads to less spilling at the cost of inserting shuffle code. Coalescing removes shuffle code while potentially raising the register demand and causing spilling. Recent research showed that the live-range splitting of the SSA form's Æ-functions leads to chordal interference graphs. This improves upon two long-standing inconveniences of graph coloring register allocation: First, chordal graphs are optimally colorable in quadratic time. Second, the number of colors needed to color the graph is equal to the maximal register pressure in the program. However, the inserted shuffle code incurred by the Æ-functions can slow down the program severely. Hence, to make such an approach work in practice, a coalescing technique is needed that removes most of the shuffle code without causing further spilling. In this paper, we present a coalescing technique designed for, but not limited to, SSA-form register allocation. We exploit that a valid coloring can be easily obtained by an SSA-based register allocator. This initial coloring is then improved by recoloring the interference graph and assigning shuffle-code related nodes the same color. Thereby, we always keep the coloring of the graph valid. Hence, the coalescing is safe, i. e. no spill code will be caused by coalescing. Comparing to iterated register coalescing, the state of the art in safe coalescing, our method is able to remove 22.5% of the costs and 44.3% of the copies iterated coalescing left over. The best solution possible, found by a colaescer using integer linear programming (ILP), was 35.9% of the costs and 51.9% of the copies iterated coalescing left over. The runtime of programs compiled with our heuristic matches that of the programs compiled with the ILP technique.