Split register allocation: linear complexity without the performance penalty

  • Authors:

  • Boubacar Diouf;Albert Cohen;Fabrice Rastello;John Cavazos

  • Affiliations:

  • ALCHEMY Group, INRIA Saclay and Paris-Sud University;ALCHEMY Group, INRIA Saclay and Paris-Sud University;LIP, École Normale Supérieure de Lyon;University of Delaware

  • Venue:
  • HiPEAC'10 Proceedings of the 5th international conference on High Performance Embedded Architectures and Compilers
  • Year:
  • 2010

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Abstract

Just-in-time compilers are becoming ubiquitous, spurring the design of more efficient algorithms and more elaborate intermediate representations. They rely on continuous, feedback-directed (re-)compilation frameworks to adaptively select a limited set of hot functions for aggressive optimization. To date, (quasi-)linear complexity has remained a driving force in the design of just-in-time optimizers. This paper describes a split register allocator showing that linear complexity does not imply reduced code quality. We present a split compiler design, where more expensive ahead-of-time analyses guide lightweight just-in-time optimizations. A split register allocator can be very aggressive in its offline stage, producing a semantic summary through bytecode annotations that can be processed by a lightweight online stage. The challenges are fourfold: (sub-)linear-size annotation, linear-time online processing, minimal loss of code quality, and portability of the annotation. We propose a split register allocator meeting these challenges. A compact annotation derived from an optimal integer linear program (ILP) formulation of register allocation drives a linear-time algorithm near optimality. We study the robustness of this algorithm to variations in the number of physical registers. Our method is implemented in JikesRVM and evaluated on standard benchmarks.