The priority-based coloring approach to register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Register allocation via graph coloring
Register allocation via graph coloring
Bus-invert coding for low-power I/O
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Register allocation and binding for low power
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Low energy memory and register allocation using network flow
DAC '97 Proceedings of the 34th annual Design Automation Conference
Exploiting dead value information
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Proceedings of the ninth annual ACM-SIAM symposium on Discrete algorithms
Low-power memory mapping through reducing address bus activity
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Efficient global register allocation for minimizing energy consumption
ACM SIGPLAN Notices
Register allocation for irregular architectures
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
A faster optimal register allocator
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Predictive dynamic thermal management for multimedia applications
ICS '03 Proceedings of the 17th annual international conference on Supercomputing
Temperature-aware microarchitecture
Proceedings of the 30th annual international symposium on Computer architecture
Compiler-Based Register Name Adjustment for Low-Power Embedded Processors
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Differential register allocation
Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation
MiBench: A free, commercially representative embedded benchmark suite
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
A global progressive register allocator
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
Active bank switching for temperature control of the register file in a microprocessor
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Register allocation by puzzle solving
Proceedings of the 2008 ACM SIGPLAN conference on Programming language design and implementation
Compiler-driven register re-assignment for register file power-density and temperature reduction
Proceedings of the 45th annual Design Automation Conference
Thermal-aware post compilation for VLIW architectures
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
LCPC'06 Proceedings of the 19th international conference on Languages and compilers for parallel computing
Register allocation after classical SSA elimination is NP-Complete
FOSSACS'06 Proceedings of the 9th European joint conference on Foundations of Software Science and Computation Structures
Register allocation via coloring of chordal graphs
APLAS'05 Proceedings of the Third Asian conference on Programming Languages and Systems
Register allocation for write activity minimization on non-volatile main memory for embedded systems
Journal of Systems Architecture: the EUROMICRO Journal
HiPEAC'10 Proceedings of the 5th international conference on High Performance Embedded Architectures and Compilers
Register allocation via coloring
Computer Languages
Hi-index | 0.00 |
Energy and thermal issues are two important concerns for embedded system design. Diminished energy dissipation leads to a longer battery life, while reduced temperature hotspots decelerate the physical failure mechanisms. The instruction fetch logic associated with register access has a significant contribution towards the total energy consumption. Meanwhile, the register file has also been previously shown to exhibit the highest temperature compared to the rest of the components in an embedded processor. Therefore, the optimization of energy and the resolution of the thermal issue for register accesses are of great significance. In this article, register allocation techniques are studied to simultaneously reduce energy consumption and heat buildup on register accesses for embedded systems. Contrary to prevailing intuition, we observe that optimizing energy and optimizing temperature on register accesses conflict with each other. We introduce a rotator hardware in the instruction decoder to facilitate a balanced solution for the two conflicting objectives. Algorithms for register allocation and refinement are proposed based on the access patterns and the effects of the rotator. Experimental results show that the proposed algorithms obtain notable improvements of energy and peak temperature for embedded applications.