Combinatorial optimization: algorithms and complexity
Combinatorial optimization: algorithms and complexity
On the Minimization of Loads/Stores in Local Register Allocation
IEEE Transactions on Software Engineering
The priority-based coloring approach to register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Register allocation via hierarchical graph coloring
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
A global, dynamic register allocation and binding for a data path synthesis system
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Allocation algorithms based on path analysis
Integration, the VLSI Journal - Special issue on high-level synthesis
On the k-coloring of intervals
Discrete Applied Mathematics
Register allocation and binding for low power
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Power minimization in IC design: principles and applications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Demand-driven register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Low energy memory and register allocation using network flow
DAC '97 Proceedings of the 34th annual Design Automation Conference
Optimal and near-optimal global register allocations using 0–1 integer programming
Software—Practice & Experience
The design and implementation of RAP: a PDG-based register allocator
Software—Practice & Experience
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
Global register allocation for minimizing energy consumption
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Modern Compiler Implementation in C: Basic Techniques
Modern Compiler Implementation in C: Basic Techniques
Digital Circuits with Microprocessor Applications
Digital Circuits with Microprocessor Applications
Global Register Allocation Based on Graph Fusion
LCPC '96 Proceedings of the 9th International Workshop on Languages and Compilers for Parallel Computing
Register allocation & spilling via graph coloring
SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
Activity-sensitive architectural power analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimizing power using transformations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
SARA: StreAm register allocation
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
ACM Transactions on Embedded Computing Systems (TECS)
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Data referencing during program execution can be a significant source of energy consumption especially for data-intensive programs. In this paper, we propose an approach to minimize such energy consumption by allocating data to proper registers and memory. Through careful analysis of boundary conditions between consecutive blocks, our approach efficiently handles various control structures including branches, merges and loops, and achieves the allocation results benefiting the whole program. The computational cost for solving the energy minimization allocation problem is rather low comparing with known approaches while the quality of the results are very encouraging.