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SIGPLAN '86 Proceedings of the 1986 SIGPLAN symposium on Compiler construction
Register allocation for GaAs computer systems
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Register allocation by priority-based coloring
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Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Register allocation & spilling via graph coloring
SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
Register allocation via hierarchical graph coloring
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
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Efficient register allocation via coloring using clique separators
ACM Transactions on Programming Languages and Systems (TOPLAS)
Improvements to graph coloring register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Register allocation over the program dependence graph
PLDI '94 Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation
Proceedings of the 28th annual international symposium on Microarchitecture
tcc: a system for fast, flexible, and high-level dynamic code generation
Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation
Experiences with Cooperating Register Allocation and Instruction Scheduling
International Journal of Parallel Programming
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Achieving efficient register allocation via parallelism
SAC '95 Proceedings of the 1995 ACM symposium on Applied computing
A faster optimal register allocator
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Coloring heuristics for register allocation
ACM SIGPLAN Notices - Best of PLDI 1979-1999
Balancing register allocation across threads for a multithreaded network processor
Proceedings of the ACM SIGPLAN 2004 conference on Programming language design and implementation
A fast, memory-efficient register allocation framework for embedded systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
Approximations for Aligned Coloring and Spillage Minimization in Interval and Chordal Graphs
APPROX '09 / RANDOM '09 Proceedings of the 12th International Workshop and 13th International Workshop on Approximation, Randomization, and Combinatorial Optimization. Algorithms and Techniques
Detecting bugs in register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Catching and identifying bugs in register allocation
SAS'06 Proceedings of the 13th international conference on Static Analysis
Combining offline and online optimizations: register allocation and method inlining
APLAS'06 Proceedings of the 4th Asian conference on Programming Languages and Systems
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Although graph coloring is widely recognized as an effective technique for global register allocation, the overhead can be quite high, not only in execution time but also in memory, as the size of the interference graph needed in coloring can become quite large. In this paper, we present an algorithm based upon a result by R. Tarjan regarding the colorability of graphs which are decomposable using clique separators, that improves on the overhead of coloring. The algorithm first partitions program code into code segments using the notion of clique separators. The interference graphs for the code partitions are next constructed one at a time and colored independently. The colorings for the partitions are combined to obtain a register allocation for the program code. The technique presented is both efficient in space and time because the graph for only a single code segment needs to be constructed and colored at any given point in time. The partitioning of a graph using clique separators increases the likelihood of obtaining a coloring without spilling and hence an efficient allocation of registers for the program. For straight line code an optimal allocation for the entire program code can be obtained from optimal allocations for individual code segments. In the presence of branches, optimal allocation along one execution path and a near optimal allocation along alternative paths can be potentially obtained. Since the algorithm is highly efficient, it eliminates the need for a local register allocation phase.