Register allocation in the SPUR Lisp compiler
SIGPLAN '86 Proceedings of the 1986 SIGPLAN symposium on Compiler construction
Register allocation for GaAs computer systems
Proceedings of the Twenty-First Annual Hawaii International Conference on Architecture Track
Register allocation via clique separators
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
Automatic construction of sparse data flow evaluation graphs
POPL '91 Proceedings of the 18th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Register allocation by priority-based coloring
SIGPLAN '84 Proceedings of the 1984 SIGPLAN symposium on Compiler construction
Inline routines in VAXELN Pascal
SIGPLAN '84 Proceedings of the 1984 SIGPLAN symposium on Compiler construction
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Register allocation & spilling via graph coloring
SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
Region-based compilation: an introduction and motivation
Proceedings of the 28th annual international symposium on Microarchitecture
Achieving efficient register allocation via parallelism
SAC '95 Proceedings of the 1995 ACM symposium on Applied computing
Look-ahead allocation in the presence of branches
SAC '97 Proceedings of the 1997 ACM symposium on Applied computing
Global array reference allocation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Array Reference Allocation Using SSA-Form and Live Range Growth
LCTES '00 Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems
Optimal Live Range Merge for Address Register Allocation in Embedded Programs
CC '01 Proceedings of the 10th International Conference on Compiler Construction
A fast, memory-efficient register allocation framework for embedded systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
Live-range unsplitting for faster optimal coalescing
Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Techniques for Region-Based Register Allocation
Proceedings of the 7th annual IEEE/ACM International Symposium on Code Generation and Optimization
A decoupled non-SSA global register allocation using bipartite liveness graphs
ACM Transactions on Architecture and Code Optimization (TACO)
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Although graph coloring is widely recognized as an effective technique for register allocation, memory demands can become quite high for large interference graphs that are needed in coloring. In this paper we present an algorithm that uses the notion of clique separators to improve the space overhead of coloring. The algorithm, based on a result by R. Tarjan regarding the colorability of graphs, partitions program code into code segments using clique separators. The interference graphs for the code partitions are constructed one at a time and colored independently. The colorings for the partitions are combined to obtain a register allocation for the entire program. This approach can be used to perform register allocation in a space-efficient manner. For straight-line code (e.g., local register allocation), an optimal allocation can be obtained from optimal allocations for individual code partitions. Experimental results are presented demonstrating memory demand reductions for interference graphs when allocating registers using clique separators.