A portable global optimizer and linker
PLDI '88 Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation
Spill code minimization techniques for optimizing compliers
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
Register allocation via clique separators
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
The priority-based coloring approach to register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Register allocation across procedure and module boundaries
PLDI '90 Proceedings of the ACM SIGPLAN 1990 conference on Programming language design and implementation
Integrating register allocation and instruction scheduling for RISCs
ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems
Verifying the correctness of compiler transformations on basic blocks using abstract interpretation
PEPM '91 Proceedings of the 1991 ACM SIGPLAN symposium on Partial evaluation and semantics-based program manipulation
PLDI '92 Proceedings of the ACM SIGPLAN 1992 conference on Programming language design and implementation
Register allocation with instruction scheduling
PLDI '93 Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation
Improvements to graph coloring register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
ACM Transactions on Programming Languages and Systems (TOPLAS)
MediaBench: a tool for evaluating and synthesizing multimedia and communicatons systems
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
The design and implementation of a certifying compiler
PLDI '98 Proceedings of the ACM SIGPLAN 1998 conference on Programming language design and implementation
Linear scan register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Translation validation for an optimizing compiler
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
Proving correctness of compiler optimizations by temporal logic
POPL '02 Proceedings of the 29th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Automatically proving the correctness of compiler optimizations
PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation
Register allocation & spilling via graph coloring
SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
A generalized algorithm for graph-coloring register allocation
Proceedings of the ACM SIGPLAN 2004 conference on Programming language design and implementation
Automated soundness proofs for dataflow analyses and transformations via local rules
Proceedings of the 32nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Register allocation by proof transformation
ESOP'03 Proceedings of the 12th European conference on Programming
Formal verification of translation validators: a case study on instruction scheduling optimizations
Proceedings of the 35th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
CoVaC: Compiler Validation by Program Analysis of the Cross-Product
FM '08 Proceedings of the 15th international symposium on Formal Methods
Validation of GCC optimizers through trace generation
Software—Practice & Experience
Verified validation of lazy code motion
Proceedings of the 2009 ACM SIGPLAN conference on Programming language design and implementation
A Formally Verified Compiler Back-end
Journal of Automated Reasoning
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
A simple, verified validator for software pipelining
Proceedings of the 37th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Validating register allocation and spilling
CC'10/ETAPS'10 Proceedings of the 19th joint European conference on Theory and Practice of Software, international conference on Compiler Construction
A framework for end-to-end verification and evaluation of register allocators
SAS'07 Proceedings of the 14th international conference on Static Analysis
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Although there are many register allocation algorithms that work well, it can be difficult to correctly implement these algorithms. As a result, it is common for bugs to remain in the register allocator, even after the compiler is released. The register allocator may run, but bugs can cause it to produce incorrect output code. The output program may even execute properly on some test data, but errors can remain. In this paper, we propose novel data flow analyses to statically check that the output code from the register allocator is correct in terms of its data dependences. The approach is accurate, fast, and can identify and report error locations and types. No false alarms are produced. The paper describes our approach, called SARAC, and a tool, called ra-analyzer, that statically checks a register allocation and reports the errors it finds. The tool has an average compile-time overhead of only 8% and a modest average memory overhead of 85KB.