Software pipelining: an effective scheduling technique for VLIW machines
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The Omega test: a fast and practical integer programming algorithm for dependence analysis
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Lifetime-sensitive modulo scheduling
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Advanced compiler design and implementation
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Translation validation for an optimizing compiler
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A comparative study of modulo scheduling techniques
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Modern Compiler Implementation: In ML
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Validating software pipelining optimizations
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TVOC: a translation validator for optimizing compilers
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Evaluating value-graph translation validation for LLVM
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Validating register allocation and spilling
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A formally verified SSA-Based middle-end: Static single assignment meets compcert
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Formal verification of SSA-based optimizations for LLVM
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ACM Transactions on Programming Languages and Systems (TOPLAS)
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Software pipelining is a loop optimization that overlaps the execution of several iterations of a loop to expose more instruction-level parallelism. It can result in first-class performance characteristics, but at the cost of significant obfuscation of the code, making this optimization difficult to test and debug. In this paper, we present a translation validation algorithm that uses symbolic evaluation to detect semantics discrepancies between a loop and its pipelined version. Our algorithm can be implemented simply and efficiently, is provably sound, and appears to be complete with respect to most modulo scheduling algorithms. A conclusion of this case study is that it is possible and effective to use symbolic evaluation to reason about loop transformations.