Vectorizing compilers: a test suite and results
Proceedings of the 1988 ACM/IEEE conference on Supercomputing
Code generation schema for modulo scheduled loops
MICRO 25 Proceedings of the 25th annual international symposium on Microarchitecture
Dynamic memory disambiguation for array references
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
A study of pointer aliasing for software pipelining using run-time disambiguation
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
ACM Computing Surveys (CSUR)
Improving instruction-level parallelism by loop unrolling and dynamic memory disambiguation
Proceedings of the 28th annual international symposium on Microarchitecture
Advanced compiler design and implementation
Advanced compiler design and implementation
High Performance Compilers for Parallel Computing
High Performance Compilers for Parallel Computing
Run-Time Disambiguation: Coping with Statically Unpredictable Dependencies
IEEE Transactions on Computers
Translation and Run-Time Validation of Loop Transformations
Formal Methods in System Design
A simple, verified validator for software pipelining
Proceedings of the 37th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
SAS'10 Proceedings of the 17th international conference on Static analysis
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This paper describes a technique for utilizing predication to support software pipelining on EPIC architectures in the presence of dynamic memory aliasing. The essential idea is that the compiler generates an optimistic software-pipelined schedule that assumes there is no memory aliasing. The operations in the pipeline kernel are predicated, however, so that if memory aliasing is detected by a run-time check, the predicate registers are set to disable the iterationsthat are so tightly overlapped as to violate the memory dependences. We refer to these disabled kernel operations as software bubbles.