Theoretical Computer Science
Type checking records and variants in a natural extension of ML
POPL '89 Proceedings of the 16th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Efficiently computing static single assignment form and the control dependence graph
ACM Transactions on Programming Languages and Systems (TOPLAS)
Improvements to graph coloring register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
A polymorphic record calculus and its compilation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Proceedings of the 24th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
From system F to typed assembly language
POPL '98 Proceedings of the 25th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
A type system for Java bytecode subroutines
POPL '98 Proceedings of the 25th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Linear scan register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Java bytecode as a typed term calculus
Proceedings of the 4th ACM SIGPLAN international conference on Principles and practice of declarative programming
The Logical Abstract Machine: A Curry-Howard Isomorphism for Machine Code
FLOPS '99 Proceedings of the 4th Fuji International Symposium on Functional and Logic Programming
Register allocation & spilling via graph coloring
SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
A static type system for JVM access control
ICFP '03 Proceedings of the eighth ACM SIGPLAN international conference on Functional programming
Compiling ML polymorphism with explicit layout bitmap
Proceedings of the 8th ACM SIGPLAN international conference on Principles and practice of declarative programming
A type system equivalent to static single assignment
Proceedings of the 8th ACM SIGPLAN international conference on Principles and practice of declarative programming
A proof theory for machine code
ACM Transactions on Programming Languages and Systems (TOPLAS)
Verification of register allocators
VMCAI'08 Proceedings of the 9th international conference on Verification, model checking, and abstract interpretation
A framework for end-to-end verification and evaluation of register allocators
SAS'07 Proceedings of the 14th international conference on Static Analysis
| Hi-index | 0.00 |
This paper presents a proof-theoretical framework that accounts for the entire process of register allocation--liveness analysis is proof reconstruction (similar to type inference), and register allocation is proof transformation from a proof system with unrestricted variable accesses to proof system with restricted variable access. In our framework, the set of registers acts as a "working set" of the live variables at each instruction step, which changes during the execution of the code. This eliminates the ad hoc notion of "spilling". Memory-register moves are systematically incorporated in our proof transformation process. Its correctness is a direct corollary of our construction; the resulting proof is equivalent to the proof of the original code modulo treatment of structural rules. The framework serves as a basis for reasoning about formal properties of register allocation process, and it also yields a clean and systematic register allocation algorithm. The algorithm has been implemented, demonstrating the feasibility of the framework.